FSConfig.py (12026:1219d7a06a66) FSConfig.py (12067:9423cf8c1e87)
1# Copyright (c) 2010-2012, 2015-2016 ARM Limited
1# Copyright (c) 2010-2012, 2015-2017 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated

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397 self.intrctrl = IntrControl()
398 self.terminal = Terminal()
399 self.vncserver = VncServer()
400
401 if not ruby:
402 self.system_port = self.membus.slave
403
404 if ruby:
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated

--- 387 unchanged lines hidden (view full) ---

397 self.intrctrl = IntrControl()
398 self.terminal = Terminal()
399 self.vncserver = VncServer()
400
401 if not ruby:
402 self.system_port = self.membus.slave
403
404 if ruby:
405 fatal("You're trying to use Ruby on ARM, which is not working " \
406 "properly yet. If you want to test it anyway, you " \
407 "need to remove this fatal error from FSConfig.py.")
405 if buildEnv['PROTOCOL'] == 'MI_example' and num_cpus > 1:
406 fatal("The MI_example protocol cannot implement Load/Store "
407 "Exclusive operations. Multicore ARM systems configured "
408 "with the MI_example protocol will not work properly.")
409 warn("You are trying to use Ruby on ARM, which is not working "
410 "properly yet.")
408
409 return self
410
411
412def makeLinuxMipsSystem(mem_mode, mdesc=None, cmdline=None):
413 class BaseMalta(Malta):
414 ethernet = NSGigE(pci_bus=0, pci_dev=1, pci_func=0)
415 ide = IdeController(disks=[Parent.disk0, Parent.disk2],

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411
412 return self
413
414
415def makeLinuxMipsSystem(mem_mode, mdesc=None, cmdline=None):
416 class BaseMalta(Malta):
417 ethernet = NSGigE(pci_bus=0, pci_dev=1, pci_func=0)
418 ide = IdeController(disks=[Parent.disk0, Parent.disk2],

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