FSConfig.py (11563:1040cd2252d4) FSConfig.py (11598:e0ddee91eb13)
1# Copyright (c) 2010-2012, 2015 ARM Limited
1# Copyright (c) 2010-2012, 2015-2016 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated

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198 self.partition_desc_bin = binary('1up-md.bin')
199
200 self.system_port = self.membus.slave
201
202 return self
203
204def makeArmSystem(mem_mode, machine_type, num_cpus=1, mdesc=None,
205 dtb_filename=None, bare_metal=False, cmdline=None,
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated

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198 self.partition_desc_bin = binary('1up-md.bin')
199
200 self.system_port = self.membus.slave
201
202 return self
203
204def makeArmSystem(mem_mode, machine_type, num_cpus=1, mdesc=None,
205 dtb_filename=None, bare_metal=False, cmdline=None,
206 external_memory=""):
206 external_memory="", ruby=False):
207 assert machine_type
208
209 default_dtbs = {
210 "RealViewEB": None,
211 "RealViewPBX": None,
212 "VExpress_EMM": "vexpress.aarch32.ll_20131205.0-gem5.%dcpu.dtb" % num_cpus,
213 "VExpress_EMM64": "vexpress.aarch64.20140821.dtb",
214 }

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228 self = LinuxArmSystem()
229
230 if not mdesc:
231 # generic system
232 mdesc = SysConfig()
233
234 self.readfile = mdesc.script()
235 self.iobus = IOXBar()
207 assert machine_type
208
209 default_dtbs = {
210 "RealViewEB": None,
211 "RealViewPBX": None,
212 "VExpress_EMM": "vexpress.aarch32.ll_20131205.0-gem5.%dcpu.dtb" % num_cpus,
213 "VExpress_EMM64": "vexpress.aarch64.20140821.dtb",
214 }

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228 self = LinuxArmSystem()
229
230 if not mdesc:
231 # generic system
232 mdesc = SysConfig()
233
234 self.readfile = mdesc.script()
235 self.iobus = IOXBar()
236 self.membus = MemBus()
237 self.membus.badaddr_responder.warn_access = "warn"
238 self.bridge = Bridge(delay='50ns')
239 self.bridge.master = self.iobus.slave
240 self.bridge.slave = self.membus.master
236 if not ruby:
237 self.bridge = Bridge(delay='50ns')
238 self.bridge.master = self.iobus.slave
239 self.membus = MemBus()
240 self.membus.badaddr_responder.warn_access = "warn"
241 self.bridge.slave = self.membus.master
241
242 self.mem_mode = mem_mode
243
244 platform_class = PlatformConfig.get(machine_type)
245 # Resolve the real platform name, the original machine_type
246 # variable might have been an alias.
247 machine_type = platform_class.__name__
248 self.realview = platform_class()

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313 'lpj=19988480 norandmaps rw loglevel=8 ' + \
314 'mem=%(mem)s root=%(rootdev)s'
315
316 # When using external memory, gem5 writes the boot loader to nvmem
317 # and then SST will read from it, but SST can only get to nvmem from
318 # iobus, as gem5's membus is only used for initialization and
319 # SST doesn't use it. Attaching nvmem to iobus solves this issue.
320 # During initialization, system_port -> membus -> iobus -> nvmem.
242
243 self.mem_mode = mem_mode
244
245 platform_class = PlatformConfig.get(machine_type)
246 # Resolve the real platform name, the original machine_type
247 # variable might have been an alias.
248 machine_type = platform_class.__name__
249 self.realview = platform_class()

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314 'lpj=19988480 norandmaps rw loglevel=8 ' + \
315 'mem=%(mem)s root=%(rootdev)s'
316
317 # When using external memory, gem5 writes the boot loader to nvmem
318 # and then SST will read from it, but SST can only get to nvmem from
319 # iobus, as gem5's membus is only used for initialization and
320 # SST doesn't use it. Attaching nvmem to iobus solves this issue.
321 # During initialization, system_port -> membus -> iobus -> nvmem.
321 if external_memory:
322 if external_memory or ruby:
322 self.realview.setupBootLoader(self.iobus, self, binary)
323 else:
324 self.realview.setupBootLoader(self.membus, self, binary)
325 self.gic_cpu_addr = self.realview.gic.cpu_addr
326 self.flags_addr = self.realview.realview_io.pio_addr + 0x30
327
328 # This check is for users who have previously put 'android' in
329 # the disk image filename to tell the config scripts to

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361 port_type=external_memory,
362 addr_ranges=self.mem_ranges)
363 self.iocache.port = self.iobus.master
364
365 # Let system_port get to nvmem and nothing else.
366 self.bridge.ranges = [self.realview.nvmem.range]
367
368 self.realview.attachOnChipIO(self.iobus)
323 self.realview.setupBootLoader(self.iobus, self, binary)
324 else:
325 self.realview.setupBootLoader(self.membus, self, binary)
326 self.gic_cpu_addr = self.realview.gic.cpu_addr
327 self.flags_addr = self.realview.realview_io.pio_addr + 0x30
328
329 # This check is for users who have previously put 'android' in
330 # the disk image filename to tell the config scripts to

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362 port_type=external_memory,
363 addr_ranges=self.mem_ranges)
364 self.iocache.port = self.iobus.master
365
366 # Let system_port get to nvmem and nothing else.
367 self.bridge.ranges = [self.realview.nvmem.range]
368
369 self.realview.attachOnChipIO(self.iobus)
370 # Attach off-chip devices
371 self.realview.attachIO(self.iobus)
372 elif ruby:
373 self._dma_ports = [ ]
374 self.realview.attachOnChipIO(self.iobus, dma_ports=self._dma_ports)
375 # Force Ruby to treat the boot ROM as an IO device.
376 self.realview.nvmem.in_addr_map = False
377 self.realview.attachIO(self.iobus, dma_ports=self._dma_ports)
369 else:
370 self.realview.attachOnChipIO(self.membus, self.bridge)
378 else:
379 self.realview.attachOnChipIO(self.membus, self.bridge)
380 # Attach off-chip devices
381 self.realview.attachIO(self.iobus)
371
382
372 # Attach off-chip devices
373 self.realview.attachIO(self.iobus)
374 for dev_id, dev in enumerate(pci_devices):
375 dev.pci_bus, dev.pci_dev, dev.pci_func = (0, dev_id + 1, 0)
383 for dev_id, dev in enumerate(pci_devices):
384 dev.pci_bus, dev.pci_dev, dev.pci_func = (0, dev_id + 1, 0)
376 self.realview.attachPciDevice(dev, self.iobus)
385 self.realview.attachPciDevice(
386 dev, self.iobus,
387 dma_ports=self._dma_ports if ruby else None)
377
378 self.intrctrl = IntrControl()
379 self.terminal = Terminal()
380 self.vncserver = VncServer()
381
388
389 self.intrctrl = IntrControl()
390 self.terminal = Terminal()
391 self.vncserver = VncServer()
392
382 self.system_port = self.membus.slave
393 if not ruby:
394 self.system_port = self.membus.slave
383
384 return self
385
386
387def makeLinuxMipsSystem(mem_mode, mdesc=None, cmdline=None):
388 class BaseMalta(Malta):
389 ethernet = NSGigE(pci_bus=0, pci_dev=1, pci_func=0)
390 ide = IdeController(disks=[Parent.disk0, Parent.disk2],

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396 return self
397
398
399def makeLinuxMipsSystem(mem_mode, mdesc=None, cmdline=None):
400 class BaseMalta(Malta):
401 ethernet = NSGigE(pci_bus=0, pci_dev=1, pci_func=0)
402 ide = IdeController(disks=[Parent.disk0, Parent.disk2],

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