FSConfig.py (11238:627dd43a5846) FSConfig.py (11244:a2af58a06c4e)
1# Copyright (c) 2010-2012, 2015 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

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89
90 self.tsunami = BaseTsunami()
91
92 # Create the io bus to connect all device ports
93 self.iobus = IOXBar()
94 self.tsunami.attachIO(self.iobus)
95
96 self.tsunami.ide.pio = self.iobus.master
1# Copyright (c) 2010-2012, 2015 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

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89
90 self.tsunami = BaseTsunami()
91
92 # Create the io bus to connect all device ports
93 self.iobus = IOXBar()
94 self.tsunami.attachIO(self.iobus)
95
96 self.tsunami.ide.pio = self.iobus.master
97 self.tsunami.ide.config = self.iobus.master
98
99 self.tsunami.ethernet.pio = self.iobus.master
97
98 self.tsunami.ethernet.pio = self.iobus.master
100 self.tsunami.ethernet.config = self.iobus.master
101
102 if ruby:
103 # Store the dma devices for later connection to dma ruby ports.
104 # Append an underscore to dma_ports to avoid the SimObjectVector check.
105 self._dma_ports = [self.tsunami.ide.dma, self.tsunami.ethernet.dma]
106 else:
107 self.membus = MemBus()
108

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391 self.bridge.slave = self.membus.master
392 self.disk0 = CowIdeDisk(driveID='master')
393 self.disk2 = CowIdeDisk(driveID='master')
394 self.disk0.childImage(mdesc.disk())
395 self.disk2.childImage(disk('linux-bigswap2.img'))
396 self.malta = BaseMalta()
397 self.malta.attachIO(self.iobus)
398 self.malta.ide.pio = self.iobus.master
99
100 if ruby:
101 # Store the dma devices for later connection to dma ruby ports.
102 # Append an underscore to dma_ports to avoid the SimObjectVector check.
103 self._dma_ports = [self.tsunami.ide.dma, self.tsunami.ethernet.dma]
104 else:
105 self.membus = MemBus()
106

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389 self.bridge.slave = self.membus.master
390 self.disk0 = CowIdeDisk(driveID='master')
391 self.disk2 = CowIdeDisk(driveID='master')
392 self.disk0.childImage(mdesc.disk())
393 self.disk2.childImage(disk('linux-bigswap2.img'))
394 self.malta = BaseMalta()
395 self.malta.attachIO(self.iobus)
396 self.malta.ide.pio = self.iobus.master
399 self.malta.ide.config = self.iobus.master
400 self.malta.ide.dma = self.iobus.slave
401 self.malta.ethernet.pio = self.iobus.master
397 self.malta.ide.dma = self.iobus.slave
398 self.malta.ethernet.pio = self.iobus.master
402 self.malta.ethernet.config = self.iobus.master
403 self.malta.ethernet.dma = self.iobus.slave
404 self.simple_disk = SimpleDisk(disk=RawDiskImage(image_file = mdesc.disk(),
405 read_only = True))
406 self.intrctrl = IntrControl()
407 self.mem_mode = mem_mode
408 self.terminal = Terminal()
409 self.kernel = binary('mips/vmlinux')
410 self.console = binary('mips/console')

--- 250 unchanged lines hidden --- 		399 self.malta.ethernet.dma = self.iobus.slave
400 self.simple_disk = SimpleDisk(disk=RawDiskImage(image_file = mdesc.disk(),
401 read_only = True))
402 self.intrctrl = IntrControl()
403 self.mem_mode = mem_mode
404 self.terminal = Terminal()
405 self.kernel = binary('mips/vmlinux')
406 self.console = binary('mips/console')

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