FSConfig.py (10512:b423e1d0735e) | FSConfig.py (10588:145c436a3854) |
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1# Copyright (c) 2010-2012 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 41 unchanged lines hidden (view full) --- 50 def childImage(self, ci): 51 self.image.child.image_file = ci 52 53class MemBus(CoherentXBar): 54 badaddr_responder = BadAddr() 55 default = Self.badaddr_responder.pio 56 57 | 1# Copyright (c) 2010-2012 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 41 unchanged lines hidden (view full) --- 50 def childImage(self, ci): 51 self.image.child.image_file = ci 52 53class MemBus(CoherentXBar): 54 badaddr_responder = BadAddr() 55 default = Self.badaddr_responder.pio 56 57 |
58def makeLinuxAlphaSystem(mem_mode, mdesc = None, ruby = False): | 58def makeLinuxAlphaSystem(mem_mode, mdesc=None, ruby=False): |
59 60 class BaseTsunami(Tsunami): 61 ethernet = NSGigE(pci_bus=0, pci_dev=1, pci_func=0) 62 ide = IdeController(disks=[Parent.disk0, Parent.disk2], 63 pci_func=0, pci_dev=0, pci_bus=0) 64 65 self = LinuxAlphaSystem() 66 if not mdesc: --- 45 unchanged lines hidden (view full) --- 112 self.terminal = Terminal() 113 self.kernel = binary('vmlinux') 114 self.pal = binary('ts_osfpal') 115 self.console = binary('console') 116 self.boot_osflags = 'root=/dev/hda1 console=ttyS0' 117 118 return self 119 | 59 60 class BaseTsunami(Tsunami): 61 ethernet = NSGigE(pci_bus=0, pci_dev=1, pci_func=0) 62 ide = IdeController(disks=[Parent.disk0, Parent.disk2], 63 pci_func=0, pci_dev=0, pci_bus=0) 64 65 self = LinuxAlphaSystem() 66 if not mdesc: --- 45 unchanged lines hidden (view full) --- 112 self.terminal = Terminal() 113 self.kernel = binary('vmlinux') 114 self.pal = binary('ts_osfpal') 115 self.console = binary('console') 116 self.boot_osflags = 'root=/dev/hda1 console=ttyS0' 117 118 return self 119 |
120def makeSparcSystem(mem_mode, mdesc = None): | 120def makeSparcSystem(mem_mode, mdesc=None): |
121 # Constants from iob.cc and uart8250.cc 122 iob_man_addr = 0x9800000000 123 uart_pio_size = 8 124 125 class CowMmDisk(MmDisk): 126 image = CowDiskImage(child=RawDiskImage(read_only=True), 127 read_only=False) 128 --- 48 unchanged lines hidden (view full) --- 177 self.nvram_bin = binary('nvram1') 178 self.hypervisor_desc_bin = binary('1up-hv.bin') 179 self.partition_desc_bin = binary('1up-md.bin') 180 181 self.system_port = self.membus.slave 182 183 return self 184 | 121 # Constants from iob.cc and uart8250.cc 122 iob_man_addr = 0x9800000000 123 uart_pio_size = 8 124 125 class CowMmDisk(MmDisk): 126 image = CowDiskImage(child=RawDiskImage(read_only=True), 127 read_only=False) 128 --- 48 unchanged lines hidden (view full) --- 177 self.nvram_bin = binary('nvram1') 178 self.hypervisor_desc_bin = binary('1up-hv.bin') 179 self.partition_desc_bin = binary('1up-md.bin') 180 181 self.system_port = self.membus.slave 182 183 return self 184 |
185def makeArmSystem(mem_mode, machine_type, num_cpus = 1, mdesc = None, 186 dtb_filename = None, bare_metal=False): | 185def makeArmSystem(mem_mode, machine_type, num_cpus=1, mdesc=None, 186 dtb_filename=None, bare_metal=False): |
187 assert machine_type 188 189 if bare_metal: 190 self = ArmSystem() 191 else: 192 self = LinuxArmSystem() 193 194 if not mdesc: --- 90 unchanged lines hidden (view full) --- 285 self.terminal = Terminal() 286 self.vncserver = VncServer() 287 288 self.system_port = self.membus.slave 289 290 return self 291 292 | 187 assert machine_type 188 189 if bare_metal: 190 self = ArmSystem() 191 else: 192 self = LinuxArmSystem() 193 194 if not mdesc: --- 90 unchanged lines hidden (view full) --- 285 self.terminal = Terminal() 286 self.vncserver = VncServer() 287 288 self.system_port = self.membus.slave 289 290 return self 291 292 |
293def makeLinuxMipsSystem(mem_mode, mdesc = None): | 293def makeLinuxMipsSystem(mem_mode, mdesc=None): |
294 class BaseMalta(Malta): 295 ethernet = NSGigE(pci_bus=0, pci_dev=1, pci_func=0) 296 ide = IdeController(disks=[Parent.disk0, Parent.disk2], 297 pci_func=0, pci_dev=0, pci_bus=0) 298 299 self = LinuxMipsSystem() 300 if not mdesc: 301 # generic system --- 83 unchanged lines hidden (view full) --- 385 x86_sys.iobus = NoncoherentXBar() 386 387 # add the ide to the list of dma devices that later need to attach to 388 # dma controllers 389 x86_sys._dma_ports = [x86_sys.pc.south_bridge.ide.dma] 390 x86_sys.pc.attachIO(x86_sys.iobus, x86_sys._dma_ports) 391 392 | 294 class BaseMalta(Malta): 295 ethernet = NSGigE(pci_bus=0, pci_dev=1, pci_func=0) 296 ide = IdeController(disks=[Parent.disk0, Parent.disk2], 297 pci_func=0, pci_dev=0, pci_bus=0) 298 299 self = LinuxMipsSystem() 300 if not mdesc: 301 # generic system --- 83 unchanged lines hidden (view full) --- 385 x86_sys.iobus = NoncoherentXBar() 386 387 # add the ide to the list of dma devices that later need to attach to 388 # dma controllers 389 x86_sys._dma_ports = [x86_sys.pc.south_bridge.ide.dma] 390 x86_sys.pc.attachIO(x86_sys.iobus, x86_sys._dma_ports) 391 392 |
393def makeX86System(mem_mode, numCPUs = 1, mdesc = None, self = None, 394 Ruby = False): | 393def makeX86System(mem_mode, numCPUs=1, mdesc=None, self=None, Ruby=False): |
395 if self == None: 396 self = X86System() 397 398 if not mdesc: 399 # generic system 400 mdesc = SysConfig() 401 self.readfile = mdesc.script() 402 --- 94 unchanged lines hidden (view full) --- 497 base_entries.append(assign_to_apic) 498 assignISAInt(0, 2) 499 assignISAInt(1, 1) 500 for i in range(3, 15): 501 assignISAInt(i, i) 502 self.intel_mp_table.base_entries = base_entries 503 self.intel_mp_table.ext_entries = ext_entries 504 | 394 if self == None: 395 self = X86System() 396 397 if not mdesc: 398 # generic system 399 mdesc = SysConfig() 400 self.readfile = mdesc.script() 401 --- 94 unchanged lines hidden (view full) --- 496 base_entries.append(assign_to_apic) 497 assignISAInt(0, 2) 498 assignISAInt(1, 1) 499 for i in range(3, 15): 500 assignISAInt(i, i) 501 self.intel_mp_table.base_entries = base_entries 502 self.intel_mp_table.ext_entries = ext_entries 503 |
505def makeLinuxX86System(mem_mode, numCPUs = 1, mdesc = None, 506 Ruby = False): | 504def makeLinuxX86System(mem_mode, numCPUs=1, mdesc=None, Ruby=False): |
507 self = LinuxX86System() 508 509 # Build up the x86 system and then specialize it for Linux 510 makeX86System(mem_mode, numCPUs, mdesc, self, Ruby) 511 512 # We assume below that there's at least 1MB of memory. We'll require 2 513 # just to avoid corner cases. 514 phys_mem_size = sum(map(lambda r: r.size(), self.mem_ranges)) --- 62 unchanged lines hidden --- | 505 self = LinuxX86System() 506 507 # Build up the x86 system and then specialize it for Linux 508 makeX86System(mem_mode, numCPUs, mdesc, self, Ruby) 509 510 # We assume below that there's at least 1MB of memory. We'll require 2 511 # just to avoid corner cases. 512 phys_mem_size = sum(map(lambda r: r.size(), self.mem_ranges)) --- 62 unchanged lines hidden --- |