1# Copyright (c) 2010-2012 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 440 unchanged lines hidden (view full) --- 449 base_entries.append(bp) 450 io_apic = X86IntelMPIOAPIC( 451 id = numCPUs, 452 version = 0x11, 453 enable = True, 454 address = 0xfec00000) 455 self.pc.south_bridge.io_apic.apic_id = io_apic.id 456 base_entries.append(io_apic) |
457 # In gem5 Pc::calcPciConfigAddr(), it required "assert(bus==0)", 458 # but linux kernel cannot config PCI device if it was not connected to PCI bus, 459 # so we fix PCI bus id to 0, and ISA bus id to 1. 460 pci_bus = X86IntelMPBus(bus_id = 0, bus_type='PCI') |
461 base_entries.append(pci_bus) |
462 isa_bus = X86IntelMPBus(bus_id = 1, bus_type='ISA') 463 base_entries.append(isa_bus) 464 connect_busses = X86IntelMPBusHierarchy(bus_id=1, 465 subtractive_decode=True, parent_bus=0) |
466 ext_entries.append(connect_busses) 467 pci_dev4_inta = X86IntelMPIOIntAssignment( 468 interrupt_type = 'INT', 469 polarity = 'ConformPolarity', 470 trigger = 'ConformTrigger', |
471 source_bus_id = 0, |
472 source_bus_irq = 0 + (4 << 2), 473 dest_io_apic_id = io_apic.id, 474 dest_io_apic_intin = 16) 475 base_entries.append(pci_dev4_inta) 476 def assignISAInt(irq, apicPin): 477 assign_8259_to_apic = X86IntelMPIOIntAssignment( 478 interrupt_type = 'ExtInt', 479 polarity = 'ConformPolarity', 480 trigger = 'ConformTrigger', |
481 source_bus_id = 1, |
482 source_bus_irq = irq, 483 dest_io_apic_id = io_apic.id, 484 dest_io_apic_intin = 0) 485 base_entries.append(assign_8259_to_apic) 486 assign_to_apic = X86IntelMPIOIntAssignment( 487 interrupt_type = 'INT', 488 polarity = 'ConformPolarity', 489 trigger = 'ConformTrigger', |
490 source_bus_id = 1, |
491 source_bus_irq = irq, 492 dest_io_apic_id = io_apic.id, 493 dest_io_apic_intin = apicPin) 494 base_entries.append(assign_to_apic) 495 assignISAInt(0, 2) 496 assignISAInt(1, 1) 497 for i in range(3, 15): 498 assignISAInt(i, i) --- 67 unchanged lines hidden --- |