1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright
9# notice, this list of conditions and the following disclaimer in the
10# documentation and/or other materials provided with the distribution;
11# neither the name of the copyright holders nor the names of its
12# contributors may be used to endorse or promote products derived from
13# this software without specific prior written permission.
14#
15# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26#
27# Authors: Kevin Lim
28
29import m5
30from m5 import makeList
31from m5.objects import *
32from Benchmarks import *
33
34class CowIdeDisk(IdeDisk):
35 image = CowDiskImage(child=RawDiskImage(read_only=True),
36 read_only=False)
37
38 def childImage(self, ci):
39 self.image.child.image_file = ci
40
41def makeLinuxAlphaSystem(mem_mode, mdesc = None):
42 class BaseTsunami(Tsunami):
43 ethernet = NSGigE(pci_bus=0, pci_dev=1, pci_func=0)
44 ide = IdeController(disks=[Parent.disk0, Parent.disk2],
45 pci_func=0, pci_dev=0, pci_bus=0)
46
47 self = LinuxAlphaSystem()
48 if not mdesc:
49 # generic system
50 mdesc = SysConfig()
51 self.readfile = mdesc.script()
52 self.iobus = Bus(bus_id=0)
53 self.membus = Bus(bus_id=1)
54 self.bridge = Bridge(delay='50ns', nack_delay='4ns')
55 self.physmem = PhysicalMemory(range = AddrRange(mdesc.mem()))
56 self.bridge.side_a = self.iobus.port
57 self.bridge.side_b = self.membus.port
58 self.physmem.port = self.membus.port
59 self.disk0 = CowIdeDisk(driveID='master')
60 self.disk2 = CowIdeDisk(driveID='master')
61 self.disk0.childImage(mdesc.disk())
62 self.disk2.childImage(disk('linux-bigswap2.img'))
63 self.tsunami = BaseTsunami()
64 self.tsunami.attachIO(self.iobus)
65 self.tsunami.ide.pio = self.iobus.port
66 self.tsunami.ethernet.pio = self.iobus.port
67 self.simple_disk = SimpleDisk(disk=RawDiskImage(image_file = mdesc.disk(),
68 read_only = True))
69 self.intrctrl = IntrControl()
70 self.mem_mode = mem_mode
71 self.sim_console = SimConsole()
72 self.kernel = binary('vmlinux')
73 self.pal = binary('ts_osfpal')
74 self.console = binary('console')
75 self.boot_osflags = 'root=/dev/hda1 console=ttyS0'
76
77 return self
78
79def makeSparcSystem(mem_mode, mdesc = None):
80 class CowMmDisk(MmDisk):
81 image = CowDiskImage(child=RawDiskImage(read_only=True),
82 read_only=False)
83
84 def childImage(self, ci):
85 self.image.child.image_file = ci
86
87 self = SparcSystem()
88 if not mdesc:
89 # generic system
90 mdesc = SysConfig()
91 self.readfile = mdesc.script()
92 self.iobus = Bus(bus_id=0)
93 self.membus = Bus(bus_id=1)
94 self.bridge = Bridge(delay='50ns', nack_delay='4ns')
95 self.t1000 = T1000()
96 self.t1000.attachOnChipIO(self.membus)
97 self.t1000.attachIO(self.iobus)
98 self.physmem = PhysicalMemory(range = AddrRange(Addr('1MB'), size = '64MB'), zero = True)
99 self.physmem2 = PhysicalMemory(range = AddrRange(Addr('2GB'), size ='256MB'), zero = True)
100 self.bridge.side_a = self.iobus.port
101 self.bridge.side_b = self.membus.port
102 self.physmem.port = self.membus.port
103 self.physmem2.port = self.membus.port
104 self.rom.port = self.membus.port
105 self.nvram.port = self.membus.port
106 self.hypervisor_desc.port = self.membus.port
107 self.partition_desc.port = self.membus.port
108 self.intrctrl = IntrControl()
109 self.disk0 = CowMmDisk()
110 self.disk0.childImage(disk('disk.s10hw2'))
111 self.disk0.pio = self.iobus.port
112 self.reset_bin = binary('reset_new.bin')
113 self.hypervisor_bin = binary('q_new.bin')
114 self.openboot_bin = binary('openboot_new.bin')
115 self.nvram_bin = binary('nvram1')
116 self.hypervisor_desc_bin = binary('1up-hv.bin')
117 self.partition_desc_bin = binary('1up-md.bin')
118
119 return self
120
| 1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright
9# notice, this list of conditions and the following disclaimer in the
10# documentation and/or other materials provided with the distribution;
11# neither the name of the copyright holders nor the names of its
12# contributors may be used to endorse or promote products derived from
13# this software without specific prior written permission.
14#
15# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26#
27# Authors: Kevin Lim
28
29import m5
30from m5 import makeList
31from m5.objects import *
32from Benchmarks import *
33
34class CowIdeDisk(IdeDisk):
35 image = CowDiskImage(child=RawDiskImage(read_only=True),
36 read_only=False)
37
38 def childImage(self, ci):
39 self.image.child.image_file = ci
40
41def makeLinuxAlphaSystem(mem_mode, mdesc = None):
42 class BaseTsunami(Tsunami):
43 ethernet = NSGigE(pci_bus=0, pci_dev=1, pci_func=0)
44 ide = IdeController(disks=[Parent.disk0, Parent.disk2],
45 pci_func=0, pci_dev=0, pci_bus=0)
46
47 self = LinuxAlphaSystem()
48 if not mdesc:
49 # generic system
50 mdesc = SysConfig()
51 self.readfile = mdesc.script()
52 self.iobus = Bus(bus_id=0)
53 self.membus = Bus(bus_id=1)
54 self.bridge = Bridge(delay='50ns', nack_delay='4ns')
55 self.physmem = PhysicalMemory(range = AddrRange(mdesc.mem()))
56 self.bridge.side_a = self.iobus.port
57 self.bridge.side_b = self.membus.port
58 self.physmem.port = self.membus.port
59 self.disk0 = CowIdeDisk(driveID='master')
60 self.disk2 = CowIdeDisk(driveID='master')
61 self.disk0.childImage(mdesc.disk())
62 self.disk2.childImage(disk('linux-bigswap2.img'))
63 self.tsunami = BaseTsunami()
64 self.tsunami.attachIO(self.iobus)
65 self.tsunami.ide.pio = self.iobus.port
66 self.tsunami.ethernet.pio = self.iobus.port
67 self.simple_disk = SimpleDisk(disk=RawDiskImage(image_file = mdesc.disk(),
68 read_only = True))
69 self.intrctrl = IntrControl()
70 self.mem_mode = mem_mode
71 self.sim_console = SimConsole()
72 self.kernel = binary('vmlinux')
73 self.pal = binary('ts_osfpal')
74 self.console = binary('console')
75 self.boot_osflags = 'root=/dev/hda1 console=ttyS0'
76
77 return self
78
79def makeSparcSystem(mem_mode, mdesc = None):
80 class CowMmDisk(MmDisk):
81 image = CowDiskImage(child=RawDiskImage(read_only=True),
82 read_only=False)
83
84 def childImage(self, ci):
85 self.image.child.image_file = ci
86
87 self = SparcSystem()
88 if not mdesc:
89 # generic system
90 mdesc = SysConfig()
91 self.readfile = mdesc.script()
92 self.iobus = Bus(bus_id=0)
93 self.membus = Bus(bus_id=1)
94 self.bridge = Bridge(delay='50ns', nack_delay='4ns')
95 self.t1000 = T1000()
96 self.t1000.attachOnChipIO(self.membus)
97 self.t1000.attachIO(self.iobus)
98 self.physmem = PhysicalMemory(range = AddrRange(Addr('1MB'), size = '64MB'), zero = True)
99 self.physmem2 = PhysicalMemory(range = AddrRange(Addr('2GB'), size ='256MB'), zero = True)
100 self.bridge.side_a = self.iobus.port
101 self.bridge.side_b = self.membus.port
102 self.physmem.port = self.membus.port
103 self.physmem2.port = self.membus.port
104 self.rom.port = self.membus.port
105 self.nvram.port = self.membus.port
106 self.hypervisor_desc.port = self.membus.port
107 self.partition_desc.port = self.membus.port
108 self.intrctrl = IntrControl()
109 self.disk0 = CowMmDisk()
110 self.disk0.childImage(disk('disk.s10hw2'))
111 self.disk0.pio = self.iobus.port
112 self.reset_bin = binary('reset_new.bin')
113 self.hypervisor_bin = binary('q_new.bin')
114 self.openboot_bin = binary('openboot_new.bin')
115 self.nvram_bin = binary('nvram1')
116 self.hypervisor_desc_bin = binary('1up-hv.bin')
117 self.partition_desc_bin = binary('1up-md.bin')
118
119 return self
120
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