FSConfig.py (10588:145c436a3854) | FSConfig.py (10594:4fdc929c0aaa) |
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1# Copyright (c) 2010-2012 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 41 unchanged lines hidden (view full) --- 50 def childImage(self, ci): 51 self.image.child.image_file = ci 52 53class MemBus(CoherentXBar): 54 badaddr_responder = BadAddr() 55 default = Self.badaddr_responder.pio 56 57 | 1# Copyright (c) 2010-2012 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 41 unchanged lines hidden (view full) --- 50 def childImage(self, ci): 51 self.image.child.image_file = ci 52 53class MemBus(CoherentXBar): 54 badaddr_responder = BadAddr() 55 default = Self.badaddr_responder.pio 56 57 |
58def makeLinuxAlphaSystem(mem_mode, mdesc=None, ruby=False): | 58def fillInCmdline(mdesc, template, **kwargs): 59 kwargs.setdefault('disk', mdesc.disk()) 60 kwargs.setdefault('mem', mdesc.mem()) 61 kwargs.setdefault('script', mdesc.script()) 62 return template % kwargs |
59 | 63 |
64def makeLinuxAlphaSystem(mem_mode, mdesc=None, ruby=False, cmdline=None): 65 |
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60 class BaseTsunami(Tsunami): 61 ethernet = NSGigE(pci_bus=0, pci_dev=1, pci_func=0) 62 ide = IdeController(disks=[Parent.disk0, Parent.disk2], 63 pci_func=0, pci_dev=0, pci_bus=0) 64 65 self = LinuxAlphaSystem() 66 if not mdesc: 67 # generic system --- 40 unchanged lines hidden (view full) --- 108 self.simple_disk = SimpleDisk(disk=RawDiskImage(image_file = mdesc.disk(), 109 read_only = True)) 110 self.intrctrl = IntrControl() 111 self.mem_mode = mem_mode 112 self.terminal = Terminal() 113 self.kernel = binary('vmlinux') 114 self.pal = binary('ts_osfpal') 115 self.console = binary('console') | 66 class BaseTsunami(Tsunami): 67 ethernet = NSGigE(pci_bus=0, pci_dev=1, pci_func=0) 68 ide = IdeController(disks=[Parent.disk0, Parent.disk2], 69 pci_func=0, pci_dev=0, pci_bus=0) 70 71 self = LinuxAlphaSystem() 72 if not mdesc: 73 # generic system --- 40 unchanged lines hidden (view full) --- 114 self.simple_disk = SimpleDisk(disk=RawDiskImage(image_file = mdesc.disk(), 115 read_only = True)) 116 self.intrctrl = IntrControl() 117 self.mem_mode = mem_mode 118 self.terminal = Terminal() 119 self.kernel = binary('vmlinux') 120 self.pal = binary('ts_osfpal') 121 self.console = binary('console') |
116 self.boot_osflags = 'root=/dev/hda1 console=ttyS0' | 122 if not cmdline: 123 cmdline = 'root=/dev/hda1 console=ttyS0' 124 self.boot_osflags = fillInCmdline(mdesc, cmdline) |
117 118 return self 119 120def makeSparcSystem(mem_mode, mdesc=None): 121 # Constants from iob.cc and uart8250.cc 122 iob_man_addr = 0x9800000000 123 uart_pio_size = 8 124 --- 53 unchanged lines hidden (view full) --- 178 self.hypervisor_desc_bin = binary('1up-hv.bin') 179 self.partition_desc_bin = binary('1up-md.bin') 180 181 self.system_port = self.membus.slave 182 183 return self 184 185def makeArmSystem(mem_mode, machine_type, num_cpus=1, mdesc=None, | 125 126 return self 127 128def makeSparcSystem(mem_mode, mdesc=None): 129 # Constants from iob.cc and uart8250.cc 130 iob_man_addr = 0x9800000000 131 uart_pio_size = 8 132 --- 53 unchanged lines hidden (view full) --- 186 self.hypervisor_desc_bin = binary('1up-hv.bin') 187 self.partition_desc_bin = binary('1up-md.bin') 188 189 self.system_port = self.membus.slave 190 191 return self 192 193def makeArmSystem(mem_mode, machine_type, num_cpus=1, mdesc=None, |
186 dtb_filename=None, bare_metal=False): | 194 dtb_filename=None, bare_metal=False, cmdline=None): |
187 assert machine_type 188 189 if bare_metal: 190 self = ArmSystem() 191 else: 192 self = LinuxArmSystem() 193 194 if not mdesc: --- 68 unchanged lines hidden (view full) --- 263 self.kernel = binary('vmlinux.aarch32.ll_20131205.0-gem5') 264 else: 265 self.kernel = binary('vmlinux.arm.smp.fb.2.6.38.8') 266 267 if dtb_filename: 268 self.dtb_filename = binary(dtb_filename) 269 self.machine_type = machine_type 270 # Ensure that writes to the UART actually go out early in the boot | 195 assert machine_type 196 197 if bare_metal: 198 self = ArmSystem() 199 else: 200 self = LinuxArmSystem() 201 202 if not mdesc: --- 68 unchanged lines hidden (view full) --- 271 self.kernel = binary('vmlinux.aarch32.ll_20131205.0-gem5') 272 else: 273 self.kernel = binary('vmlinux.arm.smp.fb.2.6.38.8') 274 275 if dtb_filename: 276 self.dtb_filename = binary(dtb_filename) 277 self.machine_type = machine_type 278 # Ensure that writes to the UART actually go out early in the boot |
271 boot_flags = 'earlyprintk=pl011,0x1c090000 console=ttyAMA0 ' + \ 272 'lpj=19988480 norandmaps rw loglevel=8 ' + \ 273 'mem=%s root=/dev/sda1' % mdesc.mem() | 279 if not cmdline: 280 cmdline = 'earlyprintk=pl011,0x1c090000 console=ttyAMA0 ' + \ 281 'lpj=19988480 norandmaps rw loglevel=8 ' + \ 282 'mem=%(mem)s root=/dev/sda1' |
274 275 self.realview.setupBootLoader(self.membus, self, binary) 276 self.gic_cpu_addr = self.realview.gic.cpu_addr 277 self.flags_addr = self.realview.realview_io.pio_addr + 0x30 278 279 if mdesc.disk().lower().count('android'): 280 boot_flags += " init=/init " | 283 284 self.realview.setupBootLoader(self.membus, self, binary) 285 self.gic_cpu_addr = self.realview.gic.cpu_addr 286 self.flags_addr = self.realview.realview_io.pio_addr + 0x30 287 288 if mdesc.disk().lower().count('android'): 289 boot_flags += " init=/init " |
281 self.boot_osflags = boot_flags | 290 self.boot_osflags = fillInCmdline(mdesc, cmdline) |
282 self.realview.attachOnChipIO(self.membus, self.bridge) 283 self.realview.attachIO(self.iobus) 284 self.intrctrl = IntrControl() 285 self.terminal = Terminal() 286 self.vncserver = VncServer() 287 288 self.system_port = self.membus.slave 289 290 return self 291 292 | 291 self.realview.attachOnChipIO(self.membus, self.bridge) 292 self.realview.attachIO(self.iobus) 293 self.intrctrl = IntrControl() 294 self.terminal = Terminal() 295 self.vncserver = VncServer() 296 297 self.system_port = self.membus.slave 298 299 return self 300 301 |
293def makeLinuxMipsSystem(mem_mode, mdesc=None): | 302def makeLinuxMipsSystem(mem_mode, mdesc=None, cmdline=None): |
294 class BaseMalta(Malta): 295 ethernet = NSGigE(pci_bus=0, pci_dev=1, pci_func=0) 296 ide = IdeController(disks=[Parent.disk0, Parent.disk2], 297 pci_func=0, pci_dev=0, pci_bus=0) 298 299 self = LinuxMipsSystem() 300 if not mdesc: 301 # generic system --- 19 unchanged lines hidden (view full) --- 321 self.malta.ethernet.dma = self.iobus.slave 322 self.simple_disk = SimpleDisk(disk=RawDiskImage(image_file = mdesc.disk(), 323 read_only = True)) 324 self.intrctrl = IntrControl() 325 self.mem_mode = mem_mode 326 self.terminal = Terminal() 327 self.kernel = binary('mips/vmlinux') 328 self.console = binary('mips/console') | 303 class BaseMalta(Malta): 304 ethernet = NSGigE(pci_bus=0, pci_dev=1, pci_func=0) 305 ide = IdeController(disks=[Parent.disk0, Parent.disk2], 306 pci_func=0, pci_dev=0, pci_bus=0) 307 308 self = LinuxMipsSystem() 309 if not mdesc: 310 # generic system --- 19 unchanged lines hidden (view full) --- 330 self.malta.ethernet.dma = self.iobus.slave 331 self.simple_disk = SimpleDisk(disk=RawDiskImage(image_file = mdesc.disk(), 332 read_only = True)) 333 self.intrctrl = IntrControl() 334 self.mem_mode = mem_mode 335 self.terminal = Terminal() 336 self.kernel = binary('mips/vmlinux') 337 self.console = binary('mips/console') |
329 self.boot_osflags = 'root=/dev/hda1 console=ttyS0' | 338 if not cmdline: 339 cmdline = 'root=/dev/hda1 console=ttyS0' 340 self.boot_osflags = fillInCmdline(mdesc, cmdline) |
330 331 self.system_port = self.membus.slave 332 333 return self 334 335def x86IOAddress(port): 336 IO_address_space_base = 0x8000000000000000 337 return IO_address_space_base + port --- 158 unchanged lines hidden (view full) --- 496 base_entries.append(assign_to_apic) 497 assignISAInt(0, 2) 498 assignISAInt(1, 1) 499 for i in range(3, 15): 500 assignISAInt(i, i) 501 self.intel_mp_table.base_entries = base_entries 502 self.intel_mp_table.ext_entries = ext_entries 503 | 341 342 self.system_port = self.membus.slave 343 344 return self 345 346def x86IOAddress(port): 347 IO_address_space_base = 0x8000000000000000 348 return IO_address_space_base + port --- 158 unchanged lines hidden (view full) --- 507 base_entries.append(assign_to_apic) 508 assignISAInt(0, 2) 509 assignISAInt(1, 1) 510 for i in range(3, 15): 511 assignISAInt(i, i) 512 self.intel_mp_table.base_entries = base_entries 513 self.intel_mp_table.ext_entries = ext_entries 514 |
504def makeLinuxX86System(mem_mode, numCPUs=1, mdesc=None, Ruby=False): | 515def makeLinuxX86System(mem_mode, numCPUs=1, mdesc=None, Ruby=False, 516 cmdline=None): |
505 self = LinuxX86System() 506 507 # Build up the x86 system and then specialize it for Linux 508 makeX86System(mem_mode, numCPUs, mdesc, self, Ruby) 509 510 # We assume below that there's at least 1MB of memory. We'll require 2 511 # just to avoid corner cases. 512 phys_mem_size = sum(map(lambda r: r.size(), self.mem_ranges)) --- 28 unchanged lines hidden (view full) --- 541 # reserved for devices. 542 if len(self.mem_ranges) == 2: 543 entries.append(X86E820Entry(addr = 0x100000000, 544 size = '%dB' % (self.mem_ranges[1].size()), range_type = 1)) 545 546 self.e820_table.entries = entries 547 548 # Command line | 517 self = LinuxX86System() 518 519 # Build up the x86 system and then specialize it for Linux 520 makeX86System(mem_mode, numCPUs, mdesc, self, Ruby) 521 522 # We assume below that there's at least 1MB of memory. We'll require 2 523 # just to avoid corner cases. 524 phys_mem_size = sum(map(lambda r: r.size(), self.mem_ranges)) --- 28 unchanged lines hidden (view full) --- 553 # reserved for devices. 554 if len(self.mem_ranges) == 2: 555 entries.append(X86E820Entry(addr = 0x100000000, 556 size = '%dB' % (self.mem_ranges[1].size()), range_type = 1)) 557 558 self.e820_table.entries = entries 559 560 # Command line |
549 self.boot_osflags = 'earlyprintk=ttyS0 console=ttyS0 lpj=7999923 ' + \ 550 'root=/dev/hda1' | 561 if not cmdline: 562 cmdline = 'earlyprintk=ttyS0 console=ttyS0 lpj=7999923 root=/dev/hda1' 563 self.boot_osflags = fillInCmdline(mdesc, cmdline) |
551 self.kernel = binary('x86_64-vmlinux-2.6.22.9') 552 return self 553 554 555def makeDualRoot(full_system, testSystem, driveSystem, dumpfile): 556 self = Root(full_system = full_system) 557 self.testsys = testSystem 558 self.drivesys = driveSystem --- 16 unchanged lines hidden --- | 564 self.kernel = binary('x86_64-vmlinux-2.6.22.9') 565 return self 566 567 568def makeDualRoot(full_system, testSystem, driveSystem, dumpfile): 569 self = Root(full_system = full_system) 570 self.testsys = testSystem 571 self.drivesys = driveSystem --- 16 unchanged lines hidden --- |