1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright
9# notice, this list of conditions and the following disclaimer in the
10# documentation and/or other materials provided with the distribution;
11# neither the name of the copyright holders nor the names of its
12# contributors may be used to endorse or promote products derived from
13# this software without specific prior written permission.
14#
15# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26#
27# Authors: Kevin Lim
28
29import m5
30from m5 import makeList
31from m5.objects import *
32from Benchmarks import *
33
34class CowIdeDisk(IdeDisk):
35 image = CowDiskImage(child=RawDiskImage(read_only=True),
36 read_only=False)
37
38 def childImage(self, ci):
39 self.image.child.image_file = ci
40
41def makeLinuxAlphaSystem(mem_mode, mdesc = None):
42 class BaseTsunami(Tsunami):
43 ethernet = NSGigE(configdata=NSGigEPciData(),
44 pci_bus=0, pci_dev=1, pci_func=0)
45 ide = IdeController(disks=[Parent.disk0, Parent.disk2],
46 pci_func=0, pci_dev=0, pci_bus=0)
47
48 self = LinuxAlphaSystem()
49 if not mdesc:
50 # generic system
51 mdesc = SysConfig()
52 self.readfile = mdesc.script()
53 self.iobus = Bus(bus_id=0)
54 self.membus = Bus(bus_id=1)
55 self.bridge = Bridge(delay='50ns', nack_delay='4ns')
56 self.physmem = PhysicalMemory(range = AddrRange(mdesc.mem()))
57 self.bridge.side_a = self.iobus.port
58 self.bridge.side_b = self.membus.port
59 self.physmem.port = self.membus.port
60 self.disk0 = CowIdeDisk(driveID='master')
61 self.disk2 = CowIdeDisk(driveID='master')
62 self.disk0.childImage(mdesc.disk())
63 self.disk2.childImage(disk('linux-bigswap2.img'))
64 self.tsunami = BaseTsunami()
65 self.tsunami.attachIO(self.iobus)
66 self.tsunami.ide.pio = self.iobus.port
67 self.tsunami.ethernet.pio = self.iobus.port
68 self.simple_disk = SimpleDisk(disk=RawDiskImage(image_file = mdesc.disk(),
69 read_only = True))
70 self.intrctrl = IntrControl()
71 self.mem_mode = mem_mode
72 self.sim_console = SimConsole()
73 self.kernel = binary('vmlinux')
74 self.pal = binary('ts_osfpal')
75 self.console = binary('console')
76 self.boot_osflags = 'root=/dev/hda1 console=ttyS0'
77
78 return self
79
80def makeSparcSystem(mem_mode, mdesc = None):
81 class CowMmDisk(MmDisk):
82 image = CowDiskImage(child=RawDiskImage(read_only=True),
83 read_only=False)
84
85 def childImage(self, ci):
86 self.image.child.image_file = ci
87
88 self = SparcSystem()
89 if not mdesc:
90 # generic system
91 mdesc = SysConfig()
92 self.readfile = mdesc.script()
93 self.iobus = Bus(bus_id=0)
94 self.membus = Bus(bus_id=1)
95 self.bridge = Bridge(delay='50ns', nack_delay='4ns')
96 self.t1000 = T1000()
97 self.t1000.attachOnChipIO(self.membus)
98 self.t1000.attachIO(self.iobus)
99 self.physmem = PhysicalMemory(range = AddrRange(Addr('1MB'), size = '64MB'), zero = True)
100 self.physmem2 = PhysicalMemory(range = AddrRange(Addr('2GB'), size ='256MB'), zero = True)
101 self.bridge.side_a = self.iobus.port
102 self.bridge.side_b = self.membus.port
103 self.physmem.port = self.membus.port
104 self.physmem2.port = self.membus.port
105 self.rom.port = self.membus.port
106 self.nvram.port = self.membus.port
107 self.hypervisor_desc.port = self.membus.port
108 self.partition_desc.port = self.membus.port
109 self.intrctrl = IntrControl()
110 self.disk0 = CowMmDisk()
111 self.disk0.childImage(disk('disk.s10hw2'))
112 self.disk0.pio = self.iobus.port
113 self.reset_bin = binary('reset_new.bin')
114 self.hypervisor_bin = binary('q_new.bin')
115 self.openboot_bin = binary('openboot_new.bin')
116 self.nvram_bin = binary('nvram1')
117 self.hypervisor_desc_bin = binary('1up-hv.bin')
118 self.partition_desc_bin = binary('1up-md.bin')
119
120 return self
121
122
123def makeDualRoot(testSystem, driveSystem, dumpfile):
124 self = Root()
125 self.testsys = testSystem
126 self.drivesys = driveSystem
127 self.etherlink = EtherLink()
128 self.etherlink.int0 = Parent.testsys.tsunami.ethernet.interface
129 self.etherlink.int1 = Parent.drivesys.tsunami.ethernet.interface
130
131 if dumpfile:
132 self.etherdump = EtherDump(file=dumpfile)
133 self.etherlink.dump = Parent.etherdump
134
135 return self
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright
9# notice, this list of conditions and the following disclaimer in the
10# documentation and/or other materials provided with the distribution;
11# neither the name of the copyright holders nor the names of its
12# contributors may be used to endorse or promote products derived from
13# this software without specific prior written permission.
14#
15# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26#
27# Authors: Kevin Lim
28
29import m5
30from m5 import makeList
31from m5.objects import *
32from Benchmarks import *
33
34class CowIdeDisk(IdeDisk):
35 image = CowDiskImage(child=RawDiskImage(read_only=True),
36 read_only=False)
37
38 def childImage(self, ci):
39 self.image.child.image_file = ci
40
41def makeLinuxAlphaSystem(mem_mode, mdesc = None):
42 class BaseTsunami(Tsunami):
43 ethernet = NSGigE(configdata=NSGigEPciData(),
44 pci_bus=0, pci_dev=1, pci_func=0)
45 ide = IdeController(disks=[Parent.disk0, Parent.disk2],
46 pci_func=0, pci_dev=0, pci_bus=0)
47
48 self = LinuxAlphaSystem()
49 if not mdesc:
50 # generic system
51 mdesc = SysConfig()
52 self.readfile = mdesc.script()
53 self.iobus = Bus(bus_id=0)
54 self.membus = Bus(bus_id=1)
55 self.bridge = Bridge(delay='50ns', nack_delay='4ns')
56 self.physmem = PhysicalMemory(range = AddrRange(mdesc.mem()))
57 self.bridge.side_a = self.iobus.port
58 self.bridge.side_b = self.membus.port
59 self.physmem.port = self.membus.port
60 self.disk0 = CowIdeDisk(driveID='master')
61 self.disk2 = CowIdeDisk(driveID='master')
62 self.disk0.childImage(mdesc.disk())
63 self.disk2.childImage(disk('linux-bigswap2.img'))
64 self.tsunami = BaseTsunami()
65 self.tsunami.attachIO(self.iobus)
66 self.tsunami.ide.pio = self.iobus.port
67 self.tsunami.ethernet.pio = self.iobus.port
68 self.simple_disk = SimpleDisk(disk=RawDiskImage(image_file = mdesc.disk(),
69 read_only = True))
70 self.intrctrl = IntrControl()
71 self.mem_mode = mem_mode
72 self.sim_console = SimConsole()
73 self.kernel = binary('vmlinux')
74 self.pal = binary('ts_osfpal')
75 self.console = binary('console')
76 self.boot_osflags = 'root=/dev/hda1 console=ttyS0'
77
78 return self
79
80def makeSparcSystem(mem_mode, mdesc = None):
81 class CowMmDisk(MmDisk):
82 image = CowDiskImage(child=RawDiskImage(read_only=True),
83 read_only=False)
84
85 def childImage(self, ci):
86 self.image.child.image_file = ci
87
88 self = SparcSystem()
89 if not mdesc:
90 # generic system
91 mdesc = SysConfig()
92 self.readfile = mdesc.script()
93 self.iobus = Bus(bus_id=0)
94 self.membus = Bus(bus_id=1)
95 self.bridge = Bridge(delay='50ns', nack_delay='4ns')
96 self.t1000 = T1000()
97 self.t1000.attachOnChipIO(self.membus)
98 self.t1000.attachIO(self.iobus)
99 self.physmem = PhysicalMemory(range = AddrRange(Addr('1MB'), size = '64MB'), zero = True)
100 self.physmem2 = PhysicalMemory(range = AddrRange(Addr('2GB'), size ='256MB'), zero = True)
101 self.bridge.side_a = self.iobus.port
102 self.bridge.side_b = self.membus.port
103 self.physmem.port = self.membus.port
104 self.physmem2.port = self.membus.port
105 self.rom.port = self.membus.port
106 self.nvram.port = self.membus.port
107 self.hypervisor_desc.port = self.membus.port
108 self.partition_desc.port = self.membus.port
109 self.intrctrl = IntrControl()
110 self.disk0 = CowMmDisk()
111 self.disk0.childImage(disk('disk.s10hw2'))
112 self.disk0.pio = self.iobus.port
113 self.reset_bin = binary('reset_new.bin')
114 self.hypervisor_bin = binary('q_new.bin')
115 self.openboot_bin = binary('openboot_new.bin')
116 self.nvram_bin = binary('nvram1')
117 self.hypervisor_desc_bin = binary('1up-hv.bin')
118 self.partition_desc_bin = binary('1up-md.bin')
119
120 return self
121
122
123def makeDualRoot(testSystem, driveSystem, dumpfile):
124 self = Root()
125 self.testsys = testSystem
126 self.drivesys = driveSystem
127 self.etherlink = EtherLink()
128 self.etherlink.int0 = Parent.testsys.tsunami.ethernet.interface
129 self.etherlink.int1 = Parent.drivesys.tsunami.ethernet.interface
130
131 if dumpfile:
132 self.etherdump = EtherDump(file=dumpfile)
133 self.etherlink.dump = Parent.etherdump
134
135 return self