Searched refs:nbr_of_banks_DRAM (Results 1 - 6 of 6) sorted by relevance
/gem5/src/cpu/testers/traffic_gen/ |
H A D | dram_rot_gen.hh | 82 * @param nbr_of_banks_DRAM Total number of banks in DRAM 96 unsigned int nbr_of_banks_DRAM, unsigned int nbr_of_banks_util, 103 num_seq_pkts, page_size, nbr_of_banks_DRAM, 90 DramRotGen(SimObject &obj, MasterID master_id, Tick _duration, Addr start_addr, Addr end_addr, Addr _blocksize, Addr cacheline_size, Tick min_period, Tick max_period, uint8_t read_percent, Addr data_limit, unsigned int num_seq_pkts, unsigned int page_size, unsigned int nbr_of_banks_DRAM, unsigned int nbr_of_banks_util, unsigned int addr_mapping, unsigned int nbr_of_ranks, unsigned int max_seq_count_per_rank) argument
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H A D | dram_gen.cc | 59 unsigned int nbr_of_banks_DRAM, 69 bankBits(floorLog2(nbr_of_banks_DRAM)), 71 nbrOfBanksDRAM(nbr_of_banks_DRAM), 81 if (nbr_of_banks_util > nbr_of_banks_DRAM) 84 nbr_of_banks_util, nbr_of_banks_DRAM); 52 DramGen(SimObject &obj, MasterID master_id, Tick _duration, Addr start_addr, Addr end_addr, Addr _blocksize, Addr cacheline_size, Tick min_period, Tick max_period, uint8_t read_percent, Addr data_limit, unsigned int num_seq_pkts, unsigned int page_size, unsigned int nbr_of_banks_DRAM, unsigned int nbr_of_banks_util, unsigned int addr_mapping, unsigned int nbr_of_ranks) argument
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H A D | dram_gen.hh | 83 * @param nbr_of_banks_DRAM Total number of banks in DRAM 97 unsigned int nbr_of_banks_DRAM, unsigned int nbr_of_banks_util,
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H A D | traffic_gen.cc | 224 unsigned int nbr_of_banks_DRAM; local 229 is >> stride_size >> page_size >> nbr_of_banks_DRAM >> 255 nbr_of_banks_DRAM, 275 nbr_of_banks_DRAM,
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H A D | base.hh | 280 unsigned int nbr_of_banks_DRAM, unsigned int nbr_of_banks_util, 290 unsigned int nbr_of_banks_DRAM, unsigned int nbr_of_banks_util,
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H A D | base.cc | 405 unsigned int nbr_of_banks_DRAM, 417 nbr_of_banks_DRAM, 430 unsigned int nbr_of_banks_DRAM, 443 nbr_of_banks_DRAM, 400 createDram(Tick duration, Addr start_addr, Addr end_addr, Addr blocksize, Tick min_period, Tick max_period, uint8_t read_percent, Addr data_limit, unsigned int num_seq_pkts, unsigned int page_size, unsigned int nbr_of_banks_DRAM, unsigned int nbr_of_banks_util, unsigned int addr_mapping, unsigned int nbr_of_ranks) argument 424 createDramRot(Tick duration, Addr start_addr, Addr end_addr, Addr blocksize, Tick min_period, Tick max_period, uint8_t read_percent, Addr data_limit, unsigned int num_seq_pkts, unsigned int page_size, unsigned int nbr_of_banks_DRAM, unsigned int nbr_of_banks_util, unsigned int addr_mapping, unsigned int nbr_of_ranks, unsigned int max_seq_count_per_rank) argument
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