Searched refs:MISCREG_PMCNTENSET_EL0 (Results 1 - 4 of 4) sorted by relevance

/gem5/src/arch/arm/
H A Dpmu.cc205 case MISCREG_PMCNTENSET_EL0:
320 case MISCREG_PMCNTENSET_EL0:
H A Dmiscregs.hh587 MISCREG_PMCNTENSET_EL0, enumerator in enum:ArmISA::MiscRegIndex
H A Dmiscregs.cc2266 return MISCREG_PMCNTENSET_EL0;
4288 InitReg(MISCREG_PMCNTENSET_EL0)
/gem5/src/arch/arm/tracers/
H A Dtarmac_parser.cc548 { "pmcntenset_el0", MISCREG_PMCNTENSET_EL0 },

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