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/gem5/src/arch/arm/ | ||
H A D | isa.hh | 7287:25c1718b819a Wed Jun 02 01:58:00 EDT 2010 Gabe Black <gblack@eecs.umich.edu> ARM: Ignore/warn when CSSELR or CCSIDR are accessed. These registers provide information about the caches. Since we can't provide that information, these will be harmlessly inert. |
H A D | miscregs.hh | 7287:25c1718b819a Wed Jun 02 01:58:00 EDT 2010 Gabe Black <gblack@eecs.umich.edu> ARM: Ignore/warn when CSSELR or CCSIDR are accessed. These registers provide information about the caches. Since we can't provide that information, these will be harmlessly inert. |
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