Searched hist:7221 (Results 1 - 3 of 3) sorted by relevance
/gem5/src/arch/arm/isa/insts/ | ||
H A D | data.isa | 7221:99ae09123a46 Wed Jun 02 01:58:00 EDT 2010 Gabe Black <gblack@eecs.umich.edu> ARM: Implement the unsigned 8 bit and 16 bit vector adds and subtracts. |
/gem5/src/arch/arm/ | ||
H A D | utility.cc | 12495:9569e57f67f5 Thu Dec 21 19:30:00 EST 2017 Giacomo Travaglini <giacomo.travaglini@arm.com> arch-arm: isSecureBelow from armarm pseudocode This patch introduces the inSecureBelow pseudocode function defined in the armarm documentation. It also replaces the inSecureState function call which was improperly used in ELIs32: we might be in secure state (EL3), but with non-secure lower ELs (SCR.NS = 1). Change-Id: I01febcb54392ad4e51e785b4d5153aeb3437c778 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Chuan Zhu <chuan.zhu@arm.com> Reviewed-on: https://gem5-review.googlesource.com/7221 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
H A D | utility.hh | 12495:9569e57f67f5 Thu Dec 21 19:30:00 EST 2017 Giacomo Travaglini <giacomo.travaglini@arm.com> arch-arm: isSecureBelow from armarm pseudocode This patch introduces the inSecureBelow pseudocode function defined in the armarm documentation. It also replaces the inSecureState function call which was improperly used in ELIs32: we might be in secure state (EL3), but with non-secure lower ELs (SCR.NS = 1). Change-Id: I01febcb54392ad4e51e785b4d5153aeb3437c778 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Chuan Zhu <chuan.zhu@arm.com> Reviewed-on: https://gem5-review.googlesource.com/7221 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
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