Searched defs:GICC_CTLR (Results 1 - 2 of 2) sorted by relevance
| /gem5/src/dev/arm/ | ||
| H A D | gic_v2.hh | 95 GICC_CTLR = 0x00, // CPU control register enumerator in enum:GicV2::__anon123 |
| H A D | gic_v3_cpu_interface.hh | 166 GICC_CTLR = 0x0000, enumerator in enum:Gicv3CPUInterface::__anon5 |
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