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/gem5/src/arch/riscv/
H A Dfaults.cc85 MiscRegIndex cause, epc, tvec, tval; local
90 tvec = MISCREG_UTVEC;
99 tvec = MISCREG_STVEC;
109 tvec = MISCREG_MTVEC;
130 Addr addr = tc->readMiscReg(tvec) >> 2;
131 if (isInterrupt() && bits(tc->readMiscReg(tvec), 1, 0) == 1)

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