Searched refs:srlw (Results 1 - 4 of 4) sorted by relevance

/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64ui/
H A Dsrlw.S4 # srlw.S
7 # Test srlw instruction.
20 TEST_RR_OP( 2, srlw, 0xffffffff80000000, 0xffffffff80000000, 0 );
21 TEST_RR_OP( 3, srlw, 0x0000000040000000, 0xffffffff80000000, 1 );
22 TEST_RR_OP( 4, srlw, 0x0000000001000000, 0xffffffff80000000, 7 );
23 TEST_RR_OP( 5, srlw, 0x0000000000020000, 0xffffffff80000000, 14 );
24 TEST_RR_OP( 6, srlw, 0x0000000000000001, 0xffffffff80000001, 31 );
26 TEST_RR_OP( 7, srlw, 0xffffffffffffffff, 0xffffffffffffffff, 0 );
27 TEST_RR_OP( 8, srlw, 0x000000007fffffff, 0xffffffffffffffff, 1 );
28 TEST_RR_OP( 9, srlw,
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/gem5/tests/test-progs/insttest/src/riscv/
H A Drv64i.cpp415 expect<uint64_t>(255, []{return I::srlw(65280, 8);}, "srlw, general");
416 expect<uint64_t>(0, []{return I::srlw(255, 8);}, "srlw, erase");
418 []{return I::srlw(numeric_limits<int32_t>::min(), 31);},
419 "srlw, negative");
420 expect<uint64_t>(1, []{return I::srlw(0x0000000180000000LL, 31);},
421 "srlw, truncate");
H A Drv64i.h425 srlw(uint64_t rs1, uint64_t rs2) function in namespace:I
428 ROP("srlw", rd, rs1, rs2);
/gem5/tests/test-progs/asmtest/src/riscv/env/
H A Dencoding.h1015 DECLARE_INSN(srlw, MATCH_SRLW, MASK_SRLW)

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