Searched refs:ram (Results 1 - 7 of 7) sorted by relevance

/gem5/src/systemc/tests/systemc/misc/user_guide/chpt12.1/
H A Dram.h22 ram.h --
38 /* Filename ram.h */
39 /* This is the interface file for asynchronous process 'ram' */
43 SC_MODULE( ram )
45 SC_HAS_PROCESS( ram );
54 ram(sc_module_name NAME, function
H A Dram.cpp22 ram.cpp --
38 /* Filename ram.cc */
39 /* This is the implementation file for asynchronous process `ram' */
41 #include "ram.h"
45 void ram::entry()
H A Dmain.cpp41 #include "ram.h"
56 ram R("Ram", data2, cs, we, addr, data1);
/gem5/src/systemc/tests/systemc/misc/user_guide/chpt12.2/
H A Dram.h22 ram.h --
38 /* Filename ram.h */
39 /* This is the interface file for synchronous process 'ram' */
43 SC_MODULE( ram )
45 SC_HAS_PROCESS( ram );
62 ram(sc_module_name NAME, function
H A Dram.cpp22 ram.cpp --
38 /* Filename ram.cc */
39 /* This is the implementation file for asynchronous process `ram' */
41 #include "ram.h"
43 void ram::entry()
H A Dmain.cpp41 #include "ram.h"
55 ram R("Ram", clk, data2, cs, we, addr, data1, delay_cycles);
/gem5/ext/dsent/model/electrical/router/
H A DRouterInputPort.cc130 ElectricalModel* ram = ModelGen::createRAM(buffer_model, ram_name, getTechModel()); local
131 ram->setParameter("NumberEntries", total_number_bufs);
132 ram->setParameter("NumberBits", number_bits_per_flit);
133 ram->construct();
155 portConnect(ram, "In", "FlitIn");
158 portConnect(ram, "WRAddr" + (String)i, "FlitIn", makeNetIndex(i));
159 portConnect(ram, "RDAddr" + (String)i, "RDAddr_DFF_Out" + (String)i);
161 portConnect(ram, "WE", "FlitIn", makeNetIndex(number_bits_per_flit-1));
162 portConnect(ram, "CK", "CK");
163 portConnect(ram, "Ou
201 ElectricalModel* ram = (ElectricalModel*)getSubInstance("RAM"); local
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