Searched refs:begin (Results 1 - 25 of 296) sorted by relevance

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/gem5/ext/drampower/src/
H A DMemBankWiseParams.cc76 std::iota(activeBanks.begin(), activeBanks.end(), 0);
85 std::iota(activeBanks.begin(), activeBanks.end(), 0);
94 std::iota(activeBanks.begin(), activeBanks.end(), 0);
103 std::iota(activeBanks.begin(), activeBanks.end(), 0);
112 std::iota(activeBanks.begin(), activeBanks.end(), 2);
121 std::iota(activeBanks.begin(), activeBanks.end(), 4);
130 std::iota(activeBanks.begin(), activeBanks.end(), 6);
139 std::iota(activeBanks.begin(), activeBanks.end(), 7);
148 std::iota(activeBanks.begin(), activeBanks.end(), 0);
159 return (std::find(activeBanks.begin(), activeBank
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H A DParametrisable.cc56 vector<Parameter>::iterator p = parameters.begin();
77 for (vector<Parameter>::iterator p = parameters.begin();
98 for (vector<Parameter>::const_iterator p = parameters.begin();
107 for (vector<Parameter>::const_iterator p = parameters.begin();
125 for (vector<Parameter>::const_iterator p = parameters.begin();
/gem5/src/base/
H A Dcallback.cc35 queue::iterator i = callbacks.begin();
H A Daddr_range_map.hh162 cache.erase(cache.begin(), cache.end());
163 tree.erase(tree.begin(), tree.end());
167 begin() const
169 return tree.begin();
173 begin()
175 return tree.begin();
221 cache.splice(cache.begin(), cache, last);
243 for (auto c = cache.begin(); c != cache.end(); c++) {
248 cache.splice(cache.begin(), cache, c);
258 if (next == begin())
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H A Dstl_helpers.hh79 std::for_each(container.begin(), container.end(), deletePointer<T>);
89 std::for_each(vec.begin(), vec.end(), ContainerPrint<T>(out));
/gem5/ext/ply/test/
H A Dlex_state1.py25 t.lexer.begin('comment')
31 t.lexer.begin('INITIAL')
H A Dlex_state2.py25 t.lexer.begin('comment')
31 t.lexer.begin('INITIAL')
H A Dlex_state3.py27 t.lexer.begin('comment')
33 t.lexer.begin('INITIAL')
H A Dlex_state4.py26 t.lexer.begin('comment')
32 t.lexer.begin('INITIAL')
H A Dlex_state5.py26 t.lexer.begin('comment')
32 t.lexer.begin('INITIAL')
H A Dlex_state_noerror.py25 t.lexer.begin('comment')
31 t.lexer.begin('INITIAL')
H A Dlex_state_norule.py26 t.lexer.begin('comment')
32 t.lexer.begin('INITIAL')
H A Dlex_state_try.py27 t.lexer.begin('comment')
33 t.lexer.begin('INITIAL')
/gem5/src/cpu/
H A Dcpuevent.cc42 for (i = cpuEventList.begin(); i != cpuEventList.end(); ) {
57 for (i = cpuEventList.begin(); i != cpuEventList.end(); i++) {
/gem5/util/cxx_config/
H A Dstats.cc59 for (auto i = stats.begin(); i != stats.end(); ++i)
74 for (auto i = stats.begin(); i != stats.end(); ++i) {
87 for (auto e = results.begin(); e != results.end(); ++e) {
111 for (auto i = stats.begin(); i != stats.end(); ++i)
/gem5/ext/systemc/src/tlm_utils/
H A Dpeq_with_get.h65 if (m_scheduled_events.begin()->first <= now) {
66 transaction_type* trans = m_scheduled_events.begin()->second;
67 m_scheduled_events.erase(m_scheduled_events.begin());
71 m_event.notify(m_scheduled_events.begin()->first - now);
/gem5/src/systemc/core/
H A Dsc_attr.cc44 sc_attr_cltn::begin() function in class:sc_core::sc_attr_cltn
46 return cltn.begin();
50 sc_attr_cltn::begin() const function in class:sc_core::sc_attr_cltn
52 return cltn.begin();
/gem5/src/gpu-compute/
H A Drr_scheduling_policy.hh70 sched_list->erase(sched_list->begin());
H A Dkernel_cfg.hh51 BasicBlock(uint32_t num, GPUStaticInst* begin) : argument
52 id(num), size(0), firstInstruction(begin)
/gem5/src/mem/cache/prefetch/
H A Dassociative_set.hh207 iterator begin() function in class:AssociativeSet
209 return entries.begin();
226 const_iterator begin() const function in class:AssociativeSet
228 return entries.begin();
/gem5/src/systemc/ext/tlm_utils/
H A Dpeq_with_get.h71 if (m_scheduled_events.begin()->first <= now) {
72 transaction_type *trans = m_scheduled_events.begin()->second;
73 m_scheduled_events.erase(m_scheduled_events.begin());
77 m_event.notify(m_scheduled_events.begin()->first - now);
/gem5/src/dev/net/
H A Dpktfifo.hh114 iterator begin() { return fifo.begin(); } function in class:PacketFifo
117 const_iterator begin() const { return fifo.begin(); } function in class:PacketFifo
120 EthPacketPtr front() { return fifo.begin()->packet; }
144 iterator entry = fifo.begin();
153 for (iterator i = begin(); i != end(); ++i)
162 if (i != fifo.begin()) {
183 return i->number - fifo.begin()->number;
197 for (auto i = begin();
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/gem5/src/cpu/o3/
H A Dregfile.cc144 freeList->addRegs(intRegIds.begin(), intRegIds.end());
151 freeList->addRegs(floatRegIds.begin(), floatRegIds.end());
168 freeList->addRegs(vecRegIds.begin(), vecRegIds.end());
170 freeList->addRegs(vecElemIds.begin(), vecElemIds.end());
177 freeList->addRegs(vecPredRegIds.begin(), vecPredRegIds.end());
184 freeList->addRegs(ccRegIds.begin(), ccRegIds.end());
194 vecElemIds.begin() + idx * NumVecElemPerVecReg,
195 vecElemIds.begin() + (idx+1) * NumVecElemPerVecReg);
204 return std::make_pair(intRegIds.begin(), intRegIds.end());
206 return std::make_pair(floatRegIds.begin(), floatRegId
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/gem5/src/systemc/tests/systemc/utils/sc_vector/test09/
H A Diter_test.cpp41 module_vec::const_iterator citr = mv.begin();
42 module_vec::iterator itr = mv.begin();
46 module_port_vec::iterator pitr = mpv.begin();
78 sc_assert(1 == citr - mv.begin());
80 itr += citr - mpv.begin();
90 cpitr = pitr += itr - mv.begin();
/gem5/src/mem/ruby/network/garnet2.0/
H A DflitBuffer.hh61 std::pop_heap(m_buffer.begin(), m_buffer.end(), flit::greater);
76 std::push_heap(m_buffer.begin(), m_buffer.end(), flit::greater);

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