Searched refs:aarch64 (Results 1 - 22 of 22) sorted by relevance

/gem5/tests/test-progs/pthread/
H A DMakefile.aarch6438 CROSS_COMPILE = aarch64-linux-gnu-
39 BIN_DIR = bin.aarch64
/gem5/system/arm/aarch64_bootloader/
H A Dmakefile2 aarch64-linux-gnu-gcc -c -DPHYS_OFFSET=0x80000000 -DCNTFRQ=0x01800000 -DUART_BASE=0x1c090000 -DSYSREGS_BASE=0x1c010000 -DGIC_DIST_BASE=0x2c001000 -DGIC_CPU_BASE=0x2c002000 -Dkernel=0x80080000 -Dmbox=0x8000fff8 -Ddtb=0x80000100 -o boot_emm.o -march=armv8-a boot.S
3 aarch64-linux-gnu-ld -o boot_emm.arm64 -N -Ttext 0x00000010 boot_emm.o -non_shared -static
5 aarch64-linux-gnu-gcc -c -DGICV3 -DPHYS_OFFSET=0x80000000 -DCNTFRQ=0x01800000 -DUART_BASE=0x1c090000 -DSYSREGS_BASE=0x1c010000 -DGIC_DIST_BASE=0x2c000000 -DGIC_REDIST_BASE=0x2c010000 -Dkernel=0x80080000 -Dmbox=0x8000fff8 -Ddtb=0x80000100 -o boot_emm_v2.o -march=armv8-a boot.S
6 aarch64-linux-gnu-ld -o boot_emm_v2.arm64 -N -Ttext 0x00000010 boot_emm_v2.o -non_shared -static
/gem5/util/dist/test/
H A Dtest-2nodes-AArch64.sh50 IMG=$M5_PATH/disks/aarch64-ubuntu-trusty-headless.img
51 VMLINUX=$M5_PATH/binaries/vmlinux.aarch64.20140821
52 DTB=$M5_PATH/binaries/vexpress.aarch64.20140821.dtb
/gem5/src/arch/arm/
H A Dsemihosting.cc160 warn("Unknown aarch64 semihosting call: op = 0x%x, param = 0x%x",
165 warn("Unimplemented aarch64 semihosting call: "
281 ArmSemihosting::callOpen(ThreadContext *tc, bool aarch64, argument
309 ArmSemihosting::callClose(ThreadContext *tc, bool aarch64, argument
332 ArmSemihosting::callWriteC(ThreadContext *tc, bool aarch64, argument
344 ArmSemihosting::callWrite0(ThreadContext *tc, bool aarch64, argument
361 ArmSemihosting::callWrite(ThreadContext *tc, bool aarch64, argument
382 ArmSemihosting::callRead(ThreadContext *tc, bool aarch64, argument
403 ArmSemihosting::callReadC(ThreadContext *tc, bool aarch64, argument
410 ArmSemihosting::callIsError(ThreadContext *tc, bool aarch64, argument
421 callIsTTY(ThreadContext *tc, bool aarch64, std::vector<uint64_t> &argv) argument
436 callSeek(ThreadContext *tc, bool aarch64, std::vector<uint64_t> &argv) argument
451 callFLen(ThreadContext *tc, bool aarch64, std::vector<uint64_t> &argv) argument
466 callTmpNam(ThreadContext *tc, bool aarch64, std::vector<uint64_t> &argv) argument
487 callRemove(ThreadContext *tc, bool aarch64, std::vector<uint64_t> &argv) argument
500 callRename(ThreadContext *tc, bool aarch64, std::vector<uint64_t> &argv) argument
514 callClock(ThreadContext *tc, bool aarch64, std::vector<uint64_t> &argv) argument
521 callTime(ThreadContext *tc, bool aarch64, std::vector<uint64_t> &argv) argument
528 callSystem(ThreadContext *tc, bool aarch64, std::vector<uint64_t> &argv) argument
539 callErrno(ThreadContext *tc, bool aarch64, std::vector<uint64_t> &argv) argument
547 callGetCmdLine(ThreadContext *tc, bool aarch64, std::vector<uint64_t> &argv) argument
566 callHeapInfo(ThreadContext *tc, bool aarch64, std::vector<uint64_t> &argv) argument
624 callExit(ThreadContext *tc, bool aarch64, std::vector<uint64_t> &argv) argument
637 callExitExtended(ThreadContext *tc, bool aarch64, std::vector<uint64_t> &argv) argument
658 callElapsed(ThreadContext *tc, bool aarch64, std::vector<uint64_t> &argv) argument
677 callTickFreq(ThreadContext *tc, bool aarch64, std::vector<uint64_t> &argv) argument
684 getCall(uint32_t op, bool aarch64) argument
[all...]
H A Ddecoder.cc86 if (!emi.aarch64) {
160 emi.aarch64 = pc.aarch64();
H A Dtable_walker.hh424 bool aarch64; local
478 if (aarch64)
487 if (aarch64)
495 if (aarch64)
504 if (aarch64)
515 if (aarch64) {
554 if (!currState->aarch64 && (currState->isSecure &&
557 } else if (currState->aarch64) {
698 bool aarch64; member in class:ArmISA::TableWalker::LongDescriptor::WalkerState
H A Dsemihosting.hh74 /** Perform an Arm Semihosting call from aarch64 code. */
292 * @param aarch64 True if in aarc64 mode, false otherwise.
299 RetErrno (ArmSemihosting::*call)(ThreadContext *tc, bool aarch64,
311 /** Is call implemented in aarch64? */
317 bool aarch64, std::vector<uint64_t> &argv)
347 static const SemiCall *getCall(uint32_t op, bool aarch64);
H A Dtypes.hh91 Bitfield<34> aarch64; member in namespace:ArmISA
332 aarch64() const function in class:ArmISA::PCState
338 aarch64(bool val) function in class:ArmISA::PCState
436 if (aarch64())
712 // aarch64
H A Dtlb.cc81 aarch64(false), aarch64EL(EL0), isPriv(false), isSecure(false),
128 aarch64 ? aarch64EL : EL1);
571 if (aarch64)
786 assert(aarch64);
1047 if (aarch64)
1055 bool long_desc_format = aarch64 || longDescFormatInUse(tc);
1311 aarch64 = isStage2 ?
1315 if (aarch64) { // AArch64
1466 ExceptionLevel target_el = aarch64 ? aarch64EL : EL1;
1467 if (aarch64) {
[all...]
H A Dtable_walker.cc131 tc(nullptr), aarch64(false), el(EL0), physAddrRange(0), req(nullptr),
238 currState->aarch64 = ELIs64(_tc, EL2);
242 currState->aarch64 =
261 if (currState->aarch64)
267 if (currState->aarch64) {
310 bool long_desc_format = currState->aarch64 || _isHyp || isStage2 ||
328 if (currState->aarch64)
351 if (currState->aarch64)
388 if (currState->aarch64)
707 currState->longDesc.aarch64
[all...]
H A Dprocess.cc473 pc.aarch64(arch == ObjectFile::Arm64);
474 pc.nextAArch64(pc.aarch64());
H A Dtlb.hh412 bool aarch64; member in class:ArmISA::TLB
H A Dfaults.cc434 // Determine target exception level (aarch64) or target execution
478 // or EL (aarch64) and the ending mode or EL.
612 pc.aarch64(!cpsr.width);
702 pc.aarch64(!cpsr.width);
764 pc.aarch64(true);
981 // esr.ec = machInst.aarch64 ? SvcAArch64 : SvcAArch32;
983 // if (machInst.aarch64)
H A Disa.hh774 if (pc.aarch64()) {
/gem5/util/m5/
H A DMakefile.aarch6443 ifneq ($(shell uname -m), aarch64)
44 CROSS_COMPILE?=aarch64-linux-gnu-
/gem5/src/arch/arm/tracers/
H A Dtarmac_base.cc103 if (pc.aarch64())
/gem5/src/arch/arm/insts/
H A Dpseudo.cc66 if (machInst.aarch64) {
70 // aarch64 mode and raise a PCAlignment fault instead.
H A Dstatic_inst.hh62 bool aarch64; member in class:ArmISA::ArmStaticInst
150 aarch64 = machInst.aarch64;
154 intWidth = (aarch64 && bits(machInst, 31)) ? 64 : 32;
388 * See aarch64/exceptions/traps/AArch64.AdvSIMDFPAccessTrap in the
399 * See aarch64/exceptions/traps/AArch64.CheckFPAdvSIMDTrap in the
408 * See aarch64/exceptions/traps/AArch64.CheckFPAdvSIMDEnabled in the
435 * Check if WFE/WFI instruction execution in aarch64 should be trapped.
437 * See aarch64/exceptions/traps/AArch64.checkForWFxTrap in the
467 * See aarch64/exception
[all...]
H A Dpred_inst.hh221 if (machInst.aarch64)
H A Dvfp.hh267 bool aarch64 = false)
358 if (!aarch64) {
H A Dstatic_inst.cc301 if (aarch64) {
381 if (withPred && !aarch64) {
811 // is using aarch64
910 // whether EL1 is aarch32 or aarch64:
937 // aarch64 ISA.
942 // the case when EL2 is aarch64 and HCR.TGE is 1 as well.
1083 // aarch64
1146 // aarch64
/gem5/src/arch/arm/kvm/
H A Darmv8_cpu.cc50 static_assert(NUM_XREGS == 31, "Unexpected number of aarch64 int. regs.");
55 static_assert(NUM_QREGS == 32, "Unexpected number of aarch64 vector regs.");
347 pc.aarch64(inAArch64(tc));
354 pc.instAddr(), pc.thumb(), pc.aarch64());

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