Searched refs:MISCREG_TEECR (Results 1 - 4 of 4) sorted by relevance

/gem5/src/arch/arm/
H A Dutility.cc638 case MISCREG_TEECR:
H A Dmiscregs.hh137 MISCREG_TEECR, // not in ARM DDI 0487A.b+ enumerator in enum:ArmISA::MiscRegIndex
H A Dmiscregs.cc3099 InitReg(MISCREG_TEECR)
/gem5/src/arch/arm/tracers/
H A Dtarmac_parser.cc125 { "teecr", MISCREG_TEECR },

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