Searched refs:MISCREG_PMEVTYPER0_EL0 (Results 1 - 4 of 4) sorted by relevance

/gem5/src/arch/arm/
H A Dpmu.cc246 case MISCREG_PMEVTYPER0_EL0...MISCREG_PMEVTYPER5_EL0:
247 setCounterTypeRegister(misc_reg - MISCREG_PMEVTYPER0_EL0, val);
359 case MISCREG_PMEVTYPER0_EL0...MISCREG_PMEVTYPER5_EL0:
360 return getCounterTypeRegister(misc_reg - MISCREG_PMEVTYPER0_EL0);
H A Dmiscregs.hh638 MISCREG_PMEVTYPER0_EL0, enumerator in enum:ArmISA::MiscRegIndex
H A Dmiscregs.cc2701 return MISCREG_PMEVTYPER0_EL0;
4431 InitReg(MISCREG_PMEVTYPER0_EL0)
/gem5/src/arch/arm/tracers/
H A Dtarmac_parser.cc600 { "pmevtyper0_el0", MISCREG_PMEVTYPER0_EL0 },

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