Searched refs:MISCREG_CTR (Results 1 - 5 of 5) sorted by relevance

/gem5/src/arch/arm/
H A Dutility.cc499 case MISCREG_CTR:
H A Dmiscregs.hh145 MISCREG_CTR, enumerator in enum:ArmISA::MiscRegIndex
H A Disa.cc546 case MISCREG_CTR: // AArch32, ARMv7, top bit set
H A Dmiscregs.cc142 return MISCREG_CTR;
3114 InitReg(MISCREG_CTR)
/gem5/src/arch/arm/tracers/
H A Dtarmac_parser.cc133 { "ctr", MISCREG_CTR },

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