Searched refs:DRAM_BASE (Results 1 - 3 of 3) sorted by relevance
/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64si/ |
H A D | dirty.S | 31 sw t2, dummy - DRAM_BASE, a0 39 lw t0, dummy - DRAM_BASE 43 sw t2, dummy - DRAM_BASE, a0 46 lw t0, dummy - DRAM_BASE 65 lw a0, page_table_1 - DRAM_BASE 67 sw a0, page_table_1 - DRAM_BASE, t0 69 sw a0, page_table_1 - DRAM_BASE, t0 126 page_table_1: .dword (DRAM_BASE/RISCV_PGSIZE << PTE_PPN_SHIFT) | PTE_V | PTE_U | PTE_R | PTE_W | PTE_X | PTE_A
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/gem5/tests/test-progs/asmtest/src/riscv/env/v/ |
H A D | vm.c | 22 #define pa2kva(pa) ((void*)(pa) - DRAM_BASE - MEGAPAGE_SIZE) 199 uintptr_t paddr = DRAM_BASE + ((random % (2 * (MAX_TEST_PAGES + 1) * PGSIZE)) & -4); 218 #if (MAX_TEST_PAGES > PTES_PER_PT) || (DRAM_BASE % MEGAPAGE_SIZE) != 0 226 kernel_l2pt[PTES_PER_PT-1] = (DRAM_BASE/RISCV_PGSIZE << PTE_PPN_SHIFT) | PTE_V | PTE_R | PTE_W | PTE_X | PTE_A | PTE_D; 230 l1pt[PTES_PER_PT-1] = (DRAM_BASE/RISCV_PGSIZE << PTE_PPN_SHIFT) | PTE_V | PTE_R | PTE_W | PTE_X | PTE_A | PTE_D; 263 freelist_nodes[i].addr = DRAM_BASE + (MAX_TEST_PAGES + random)*PGSIZE; 271 tf.epc = test_addr - DRAM_BASE;
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/gem5/tests/test-progs/asmtest/src/riscv/env/ |
H A D | encoding.h | 157 #define DRAM_BASE 0x80000000 macro
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