Searched refs:CSR_USTATUS (Results 1 - 1 of 1) sorted by relevance
| /gem5/src/arch/riscv/ | ||
| H A D | registers.hh | 267 CSR_USTATUS = 0x000, enumerator in enum:RiscvISA::CSRIndex 439 {CSR_USTATUS, {"ustatus", MISCREG_STATUS}}, 719 {CSR_USTATUS, USTATUS_MASK}, |
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