Searched refs:CSR_MHPMEVENT19 (Results 1 - 2 of 2) sorted by relevance

/gem5/src/arch/riscv/
H A Dregisters.hh409 CSR_MHPMEVENT19 = 0x333, enumerator in enum:RiscvISA::CSRIndex
579 {CSR_MHPMEVENT19, {"mhpmevent19", MISCREG_HPMEVENT19}},
/gem5/tests/test-progs/asmtest/src/riscv/env/
H A Dencoding.h882 #define CSR_MHPMEVENT19 0x333 macro
1374 DECLARE_CSR(mhpmevent19, CSR_MHPMEVENT19)

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