Searched refs:CSR_MHPMCOUNTER17 (Results 1 - 2 of 2) sorted by relevance

/gem5/src/arch/riscv/
H A Dregisters.hh377 CSR_MHPMCOUNTER17 = 0xC11, enumerator in enum:RiscvISA::CSRIndex
548 {CSR_MHPMCOUNTER17, {"mhpmcounter17", MISCREG_HPMCOUNTER17}},
/gem5/tests/test-progs/asmtest/src/riscv/env/
H A Dencoding.h851 #define CSR_MHPMCOUNTER17 0xb11 macro
1343 DECLARE_CSR(mhpmcounter17, CSR_MHPMCOUNTER17)

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