Searched refs:CSR_MHPMCOUNTER16 (Results 1 - 2 of 2) sorted by relevance

/gem5/src/arch/riscv/
H A Dregisters.hh376 CSR_MHPMCOUNTER16 = 0xC10, enumerator in enum:RiscvISA::CSRIndex
547 {CSR_MHPMCOUNTER16, {"mhpmcounter16", MISCREG_HPMCOUNTER16}},
/gem5/tests/test-progs/asmtest/src/riscv/env/
H A Dencoding.h850 #define CSR_MHPMCOUNTER16 0xb10 macro
1342 DECLARE_CSR(mhpmcounter16, CSR_MHPMCOUNTER16)

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