Searched refs:CSR_MHPMCOUNTER12 (Results 1 - 2 of 2) sorted by relevance

/gem5/src/arch/riscv/
H A Dregisters.hh372 CSR_MHPMCOUNTER12 = 0xC0C, enumerator in enum:RiscvISA::CSRIndex
543 {CSR_MHPMCOUNTER12, {"mhpmcounter12", MISCREG_HPMCOUNTER12}},
/gem5/tests/test-progs/asmtest/src/riscv/env/
H A Dencoding.h846 #define CSR_MHPMCOUNTER12 0xb0c macro
1338 DECLARE_CSR(mhpmcounter12, CSR_MHPMCOUNTER12)

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