Searched refs:CSR_HPMCOUNTER24 (Results 1 - 2 of 2) sorted by relevance

/gem5/src/arch/riscv/
H A Dregisters.hh302 CSR_HPMCOUNTER24 = 0xC18, enumerator in enum:RiscvISA::CSRIndex
474 {CSR_HPMCOUNTER24, {"hpmcounter24", MISCREG_HPMCOUNTER24}},
/gem5/tests/test-progs/asmtest/src/riscv/env/
H A Dencoding.h778 #define CSR_HPMCOUNTER24 0xc18 macro
1270 DECLARE_CSR(hpmcounter24, CSR_HPMCOUNTER24)

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