Searched refs:CSR_HPMCOUNTER17 (Results 1 - 2 of 2) sorted by relevance

/gem5/src/arch/riscv/
H A Dregisters.hh295 CSR_HPMCOUNTER17 = 0xC11, enumerator in enum:RiscvISA::CSRIndex
467 {CSR_HPMCOUNTER17, {"hpmcounter17", MISCREG_HPMCOUNTER17}},
/gem5/tests/test-progs/asmtest/src/riscv/env/
H A Dencoding.h771 #define CSR_HPMCOUNTER17 0xc11 macro
1263 DECLARE_CSR(hpmcounter17, CSR_HPMCOUNTER17)

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