Searched refs:CSR_HPMCOUNTER15 (Results 1 - 2 of 2) sorted by relevance

/gem5/src/arch/riscv/
H A Dregisters.hh293 CSR_HPMCOUNTER15 = 0xC0F, enumerator in enum:RiscvISA::CSRIndex
465 {CSR_HPMCOUNTER15, {"hpmcounter15", MISCREG_HPMCOUNTER15}},
/gem5/tests/test-progs/asmtest/src/riscv/env/
H A Dencoding.h769 #define CSR_HPMCOUNTER15 0xc0f macro
1261 DECLARE_CSR(hpmcounter15, CSR_HPMCOUNTER15)

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