Searched refs:tc (Results 51 - 75 of 304) sorted by relevance

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/gem5/src/arch/sparc/
H A Dprocess.cc71 SparcProcess::handleTrap(int trapNum, ThreadContext *tc, Fault *fault) argument
73 PCState pc = tc->pcState();
82 flushWindows(tc);
116 ThreadContext *tc = system->getThreadContext(contextIds[0]); local
120 tc->setMiscRegNoEffect(MISCREG_FSR, 0);
122 tc->setMiscRegNoEffect(MISCREG_TICK, 0);
129 // tc->setMiscRegNoEffect(MISCREG_OTHERWIN, 0);
130 tc->setIntReg(NumIntArchRegs + 6, 0);
132 // tc->setMiscRegNoEffect(MISCREG_CANRESTORE, 0);
133 tc
165 ThreadContext *tc = system->getThreadContext(contextIds[0]); local
180 ThreadContext *tc = system->getThreadContext(contextIds[0]); local
395 ThreadContext *tc = system->getThreadContext(contextIds[0]); local
436 flushWindows(ThreadContext *tc) argument
471 flushWindows(ThreadContext *tc) argument
506 getSyscallArg(ThreadContext *tc, int &i) argument
513 setSyscallArg(ThreadContext *tc, int i, RegVal val) argument
520 getSyscallArg(ThreadContext *tc, int &i) argument
527 setSyscallArg(ThreadContext *tc, int i, RegVal val) argument
534 setSyscallReturn(ThreadContext *tc, SyscallReturn sysret) argument
[all...]
/gem5/src/arch/mips/
H A Dfaults.hh88 virtual FaultVect offset(ThreadContext *tc) const = 0;
90 virtual FaultVect base(ThreadContext *tc) const
92 StatusReg status = tc->readMiscReg(MISCREG_STATUS);
94 return tc->readMiscReg(MISCREG_EBASE);
100 vect(ThreadContext *tc) const
102 return base(tc) + offset(tc);
105 void invoke(ThreadContext * tc, const StaticInstPtr &inst =
116 FaultVect offset(ThreadContext *tc) const { return vals.offset; }
137 void invoke(ThreadContext * tc, cons
165 invoke(ThreadContext * tc, const StaticInstPtr &inst = StaticInst::nullStaticInstPtr) argument
200 invoke(ThreadContext * tc, const StaticInstPtr &inst = StaticInst::nullStaticInstPtr) argument
236 setTlbExceptionState(ThreadContext *tc, uint8_t excCode) argument
253 invoke(ThreadContext * tc, const StaticInstPtr &inst = StaticInst::nullStaticInstPtr) argument
[all...]
H A Dfaults.cc103 MipsFaultBase::setExceptionState(ThreadContext *tc, uint8_t excCode) argument
106 StatusReg status = tc->readMiscReg(MISCREG_STATUS);
109 SRSCtlReg srsCtl = tc->readMiscReg(MISCREG_SRSCTL);
112 tc->setMiscRegNoEffect(MISCREG_SRSCTL, srsCtl);
117 tc->setMiscRegNoEffect(MISCREG_STATUS, status);
120 PCState pc = tc->pcState();
123 tc->setMiscRegNoEffect(MISCREG_EPC,
127 CauseReg cause = tc->readMiscReg(MISCREG_CAUSE);
131 tc->setMiscRegNoEffect(MISCREG_CAUSE, cause);
135 MipsFaultBase::invoke(ThreadContext *tc, cons argument
147 invoke(ThreadContext *tc, const StaticInstPtr &inst) argument
164 invoke(ThreadContext *tc, const StaticInstPtr &inst) argument
170 invoke(ThreadContext *tc, const StaticInstPtr &inst) argument
[all...]
/gem5/src/arch/arm/
H A Dutility.hh100 * @param tc The thread context.
103 void zeroRegisters(TC *tc);
105 inline void startupCPU(ThreadContext *tc, int cpuId) argument
107 tc->activate();
118 void initCPU(ThreadContext *tc, int cpuId);
127 inUserMode(ThreadContext *tc) argument
129 return inUserMode(tc->readMiscRegNoEffect(MISCREG_CPSR));
139 inPrivilegedMode(ThreadContext *tc) argument
141 return !inUserMode(tc);
144 bool inAArch64(ThreadContext *tc);
147 currOpMode(ThreadContext *tc) argument
154 currEL(ThreadContext *tc) argument
346 getExecutingAsid(ThreadContext *tc) argument
381 byteOrder(ThreadContext *tc) argument
[all...]
H A Dtlbi_op.hh63 virtual void operator()(ThreadContext* tc) {} argument
68 * @param tc Thread Context
71 broadcast(ThreadContext *tc) argument
73 System *sys = tc->getSystemPtr();
93 void operator()(ThreadContext* tc) override;
104 void broadcast(ThreadContext *tc) = delete; member in class:ArmISA::ITLBIALL
106 void operator()(ThreadContext* tc) override;
117 void broadcast(ThreadContext *tc) = delete; member in class:ArmISA::DTLBIALL
119 void operator()(ThreadContext* tc) override;
130 void operator()(ThreadContext* tc) overrid
144 void broadcast(ThreadContext *tc) = delete; member in class:ArmISA::ITLBIASID
160 void broadcast(ThreadContext *tc) = delete; member in class:ArmISA::DTLBIASID
219 void broadcast(ThreadContext *tc) = delete; member in class:ArmISA::ITLBIMVA
237 void broadcast(ThreadContext *tc) = delete; member in class:ArmISA::DTLBIMVA
[all...]
H A Dvtophys.hh46 Addr vtophys(ThreadContext *tc, Addr vaddr);
47 bool virtvalid(ThreadContext *tc, Addr vaddr);
H A Dprocess.hh90 RegVal getSyscallArg(ThreadContext *tc, int &i, int width) override;
91 RegVal getSyscallArg(ThreadContext *tc, int &i) override;
92 void setSyscallArg(ThreadContext *tc, int i, RegVal val) override;
93 void setSyscallReturn(ThreadContext *tc,
110 RegVal getSyscallArg(ThreadContext *tc, int &i, int width) override;
111 RegVal getSyscallArg(ThreadContext *tc, int &i) override;
112 void setSyscallArg(ThreadContext *tc, int i, RegVal val) override;
113 void setSyscallReturn(ThreadContext *tc,
H A Dstacktrace.cc48 readSymbol(ThreadContext *tc, const std::string name) argument
50 PortProxy &vp = tc->getVirtProxy();
51 SymbolTable *symtab = tc->getSystemPtr()->kernelSymtab;
60 ProcessInfo::ProcessInfo(ThreadContext *_tc) : tc(_tc)
62 thread_info_size = readSymbol(tc, "thread_info_size");
63 task_struct_size = readSymbol(tc, "task_struct_size");
64 task_off = readSymbol(tc, "thread_info_task");
65 pid_off = readSymbol(tc, "task_struct_pid");
66 name_off = readSymbol(tc, "task_struct_comm");
78 PortProxy &vp = tc
[all...]
H A Dsystem.hh291 static ArmSystem* getArmSystem(ThreadContext *tc);
296 static bool haveSecurity(ThreadContext *tc);
301 static bool haveVirtualization(ThreadContext *tc);
306 static bool haveLPAE(ThreadContext *tc);
311 static bool highestELIs64(ThreadContext *tc);
316 static ExceptionLevel highestEL(ThreadContext *tc);
319 static bool haveEL(ThreadContext *tc, ExceptionLevel el);
324 static Addr resetAddr(ThreadContext *tc);
329 static uint8_t physAddrRange(ThreadContext *tc);
334 static Addr physAddrMask(ThreadContext *tc);
[all...]
H A Dsystem.cc178 ArmSystem::getArmSystem(ThreadContext *tc) argument
180 ArmSystem *a_sys = dynamic_cast<ArmSystem *>(tc->getSystemPtr());
186 ArmSystem::haveSecurity(ThreadContext *tc) argument
188 return FullSystem? getArmSystem(tc)->haveSecurity() : false;
210 ArmSystem::haveLPAE(ThreadContext *tc) argument
212 return FullSystem? getArmSystem(tc)->haveLPAE() : false;
216 ArmSystem::haveVirtualization(ThreadContext *tc) argument
218 return FullSystem? getArmSystem(tc)->haveVirtualization() : false;
222 ArmSystem::highestELIs64(ThreadContext *tc) argument
224 return FullSystem? getArmSystem(tc)
228 highestEL(ThreadContext *tc) argument
234 haveEL(ThreadContext *tc, ExceptionLevel el) argument
251 resetAddr(ThreadContext *tc) argument
257 physAddrRange(ThreadContext *tc) argument
263 physAddrMask(ThreadContext *tc) argument
269 haveLargeAsid64(ThreadContext *tc) argument
275 haveSemihosting(ThreadContext *tc) argument
281 callSemihosting64(ThreadContext *tc, uint32_t op, uint64_t param) argument
289 callSemihosting32(ThreadContext *tc, uint32_t op, uint32_t param) argument
[all...]
/gem5/src/sim/
H A Dpseudo_inst.cc97 pseudoInst(ThreadContext *tc, uint8_t func, uint8_t subfunc) argument
109 args[arg_num] = getArgument(tc, arg_num, sizeof(uint64_t), false);
115 arm(tc);
119 quiesce(tc);
123 quiesceNs(tc, args[0]);
127 quiesceCycles(tc, args[0]);
131 return quiesceTime(tc);
134 return rpns(tc);
137 wakeCPU(tc, args[0]);
141 m5exit(tc, arg
231 arm(ThreadContext *tc) argument
242 quiesce(ThreadContext *tc) argument
249 quiesceSkip(ThreadContext *tc) argument
256 quiesceNs(ThreadContext *tc, uint64_t ns) argument
263 quiesceCycles(ThreadContext *tc, uint64_t cycles) argument
270 quiesceTime(ThreadContext *tc) argument
279 rpns(ThreadContext *tc) argument
286 wakeCPU(ThreadContext *tc, uint64_t cpuid) argument
303 m5exit(ThreadContext *tc, Tick delay) argument
313 m5fail(ThreadContext *tc, Tick delay, uint64_t code) argument
321 loadsymbol(ThreadContext *tc) argument
373 addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr) argument
390 initParam(ThreadContext *tc, uint64_t key_str1, uint64_t key_str2) argument
435 resetstats(ThreadContext *tc, Tick delay, Tick period) argument
449 dumpstats(ThreadContext *tc, Tick delay, Tick period) argument
463 dumpresetstats(ThreadContext *tc, Tick delay, Tick period) argument
477 m5checkpoint(ThreadContext *tc, Tick delay, Tick period) argument
491 readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset) argument
533 writefile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset, Addr filename_addr) argument
576 debugbreak(ThreadContext *tc) argument
583 switchcpu(ThreadContext *tc) argument
590 togglesync(ThreadContext *tc) argument
602 workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid) argument
665 workend(ThreadContext *tc, uint64_t workid, uint64_t threadid) argument
[all...]
H A Dvptr.hh45 ThreadContext *tc; member in class:VPtr
51 : tc(_tc), ptr(p)
58 : tc(vp.tc), ptr(vp.ptr)
72 PortProxy &proxy = tc->getVirtProxy();
85 return VPtr<T>(tc, ptr + offset);
110 tc = vp.tc;
H A Dsyscall_desc.cc49 SyscallDesc::doSyscall(int callnum, ThreadContext *tc, Fault *fault) argument
52 auto process = tc->getProcessPtr();
61 arg[i] = process->getSyscallArg(tc, index);
72 SyscallReturn retval = (*executor)(this, callnum, tc);
86 process->setSyscallReturn(tc, retval);
H A Darguments.hh43 ThreadContext *tc; member in class:Arguments
65 : tc(ctx), number(n), data(new Data())
68 : tc(args.tc), number(args.number), data(args.data) {}
71 ThreadContext *getThreadContext() const { return tc; }
75 tc = args.tc;
126 return Arguments(tc, index);
139 tc->getVirtProxy().readBlob(getArg(sizeof(T)), buf, sizeof(T));
145 tc
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/gem5/src/arch/power/linux/
H A Dprocess.hh48 RegVal getSyscallArg(ThreadContext *tc, int &i);
51 void setSyscallArg(ThreadContext *tc, int i, RegVal val);
/gem5/src/arch/riscv/
H A Dstacktrace.hh61 ThreadContext *tc; member in class:RiscvISA::StackTrace
70 void trace(ThreadContext *tc, bool is_call);
74 StackTrace(ThreadContext *tc, const StaticInstPtr &inst);
80 tc = 0;
87 return tc != nullptr;
90 bool trace(ThreadContext *tc, const StaticInstPtr &inst);
124 StackTrace::trace(ThreadContext *tc, const StaticInstPtr &inst) argument
132 trace(tc, !inst->isReturn());
/gem5/src/arch/power/
H A Dstacktrace.hh61 ThreadContext *tc; member in class:PowerISA::StackTrace
70 void trace(ThreadContext *tc, bool is_call);
74 StackTrace(ThreadContext *tc, const StaticInstPtr &inst);
80 tc = 0;
87 return tc != NULL;
90 bool trace(ThreadContext *tc, const StaticInstPtr &inst);
124 StackTrace::trace(ThreadContext *tc, const StaticInstPtr &inst) argument
132 trace(tc, !inst->isReturn());
/gem5/src/arch/sparc/linux/
H A Dprocess.cc103 void Sparc32LinuxProcess::handleTrap(int trapNum, ThreadContext *tc, argument
108 tc->syscall(tc->readIntReg(1), fault);
111 SparcProcess::handleTrap(trapNum, tc, fault);
120 void Sparc64LinuxProcess::handleTrap(int trapNum, ThreadContext *tc, argument
126 tc->syscall(tc->readIntReg(1), fault);
129 SparcProcess::handleTrap(trapNum, tc, fault);
/gem5/src/arch/generic/
H A Dtlb.hh79 ThreadContext *tc, Mode mode) = 0;
93 const RequestPtr &req, ThreadContext *tc, Mode mode) = 0;
95 const RequestPtr &req, ThreadContext *tc,
98 translateFunctional(const RequestPtr &req, ThreadContext *tc, Mode mode) argument
113 * @param tc Thread context that created the request.
118 const RequestPtr &req, ThreadContext *tc, Mode mode) const = 0;
155 const RequestPtr &req, ThreadContext *tc, Mode mode) override;
157 const RequestPtr &req, ThreadContext *tc,
161 const RequestPtr &req, ThreadContext *tc, Mode mode) const override;
/gem5/src/cpu/
H A Dcpuevent.hh59 ThreadContext *tc; member in class:CpuEvent
63 : Event(p), tc(_tc)
69 /** Update all events switching old tc to new tc.
75 ThreadContext* getTC() { return tc; }
78 template <class T, void (T::* F)(ThreadContext *tc)>
88 void process() { (object->*F)(tc); }
/gem5/src/arch/alpha/
H A Dfaults.cc117 AlphaFault::invoke(ThreadContext *tc, const StaticInstPtr &inst) argument
119 FaultBase::invoke(tc);
124 PCState pc = tc->pcState();
128 tc->setMiscRegNoEffect(IPR_EXC_ADDR, pc.pc());
132 tc->setMiscRegNoEffect(IPR_EXC_ADDR,
133 tc->readMiscRegNoEffect(IPR_EXC_ADDR) + 4);
136 pc.set(tc->readMiscRegNoEffect(IPR_PAL_BASE) + vect());
137 tc->pcState(pc);
141 ArithmeticFault::invoke(ThreadContext *tc, const StaticInstPtr &inst) argument
143 FaultBase::invoke(tc);
150 invoke(ThreadContext *tc, const StaticInstPtr &inst) argument
179 invoke(ThreadContext *tc, const StaticInstPtr &inst) argument
191 invoke(ThreadContext *tc, const StaticInstPtr &inst) argument
210 invoke(ThreadContext *tc, const StaticInstPtr &inst) argument
[all...]
/gem5/src/arch/x86/
H A Dstacktrace.cc48 readSymbol(ThreadContext *tc, const std::string name) argument
50 PortProxy &vp = tc->getVirtProxy();
51 SymbolTable *symtab = tc->getSystemPtr()->kernelSymtab;
60 ProcessInfo::ProcessInfo(ThreadContext *_tc) : tc(_tc)
62 thread_info_size = readSymbol(tc, "thread_info_size");
63 task_struct_size = readSymbol(tc, "task_struct_size");
64 task_off = readSymbol(tc, "thread_info_task");
65 pid_off = readSymbol(tc, "task_struct_pid");
66 name_off = readSymbol(tc, "task_struct_comm");
78 PortProxy &vp = tc
[all...]
H A Dvtophys.cc61 vtophys(ThreadContext *tc, Addr vaddr) argument
63 Walker *walker = dynamic_cast<TLB *>(tc->getDTBPtr())->getWalker();
67 tc, addr, logBytes, BaseTLB::Read);
/gem5/src/cpu/o3/
H A Dthread_state.hh94 tc(nullptr)
120 ::serialize(*tc, cp);
132 ::unserialize(*tc, cp);
137 ThreadContext *tc; member in struct:O3ThreadState
140 ThreadContext *getTC() { return tc; }
145 process->syscall(callnum, tc, fault);
152 profile->dump(tc, *os->stream());
/gem5/src/arch/alpha/linux/
H A Dsystem.cc173 LinuxAlphaSystem::setDelayLoop(ThreadContext *tc) argument
177 Tick cpuFreq = tc->getCpuPtr()->frequency();
179 PortProxy &vp = tc->getVirtProxy();
186 LinuxAlphaSystem::SkipDelayLoopEvent::process(ThreadContext *tc) argument
188 SkipFuncEvent::process(tc);
190 ((LinuxAlphaSystem *)tc->getSystemPtr())->setDelayLoop(tc);
194 LinuxAlphaSystem::PrintThreadInfo::process(ThreadContext *tc) argument
196 Linux::ThreadInfo ti(tc);

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