Searched refs:offset (Results 101 - 125 of 189) sorted by relevance

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/gem5/src/base/
H A Dpixel.cc68 : offset(_offset),
H A Daddr_range.test.cc115 Addr offset = range[i].getOffset(addr); local
116 ASSERT_EQ(offsets[i], offset);
119 for (Addr offset: offsets) {
120 ASSERT_EQ(offset, (end - start + 1) / intlvSize);
/gem5/util/m5/
H A Dlua_gem5Op.c162 uint64_t offset = lua_tointeger(L, 2); local
164 uint64_t readlen = m5_read_file(buf, len, offset);
175 uint64_t offset = lua_tointeger(L, 3); local
177 uint64_t w_len = m5_write_file((void *)buf, len, offset, filename);
/gem5/util/
H A Dgem5img.py105 def setup(self, fileName, offset=False):
113 if offset:
143 # The fourth chunk is the offset of the partition in sectors followed by
223 if dev.setup(path, offset=True) != 0:
324 if dev.setup(path, offset=True) != 0:
348 if dev.setup(path, offset=True) != 0:
/gem5/src/dev/arm/
H A Dufs_device.cc216 scsi_out.offset = read_offset * blkSize;
221 DPRINTF(UFSHostDevice, "Read6 offset: 0x%8x, for %d blocks\n",
248 scsi_out.offset = read_offset * blkSize;
253 DPRINTF(UFSHostDevice, "Read10 offset: 0x%8x, for %d blocks\n",
283 scsi_out.offset = read_offset * blkSize;
288 DPRINTF(UFSHostDevice, "Read16 offset: 0x%8x, for %d blocks\n",
403 scsi_out.offset = write_offset * blkSize;
409 DPRINTF(UFSHostDevice, "Write6 offset: 0x%8x, for %d blocks\n",
433 scsi_out.offset = write_offset * blkSize;
439 DPRINTF(UFSHostDevice, "Write10 offset
692 readFlash(uint8_t* readaddr, uint64_t offset, uint32_t size) argument
706 writeFlash(uint8_t* writeaddr, uint64_t offset, uint32_t size) argument
1932 manageWriteTransfer(uint8_t LUN, uint64_t offset, uint32_t sg_table_length, struct UFSHCDSGEntry* sglist) argument
2121 manageReadTransfer(uint32_t size, uint32_t LUN, uint64_t offset, uint32_t sg_table_length, struct UFSHCDSGEntry* sglist) argument
[all...]
H A Dgeneric_timer.cc197 // We didn't serialize an offset before we added support for the
463 return core.virt.offset();
637 return virtTimer.offset();
640 return virtTimer.offset() >> 32;
649 return virtTimer.offset();
674 insertBits(virtTimer.offset(), 31, 0, value));
679 insertBits(virtTimer.offset(), 63, 32, value));
728 return virtTimer.offset();
731 return virtTimer.offset() >> 32;
770 return virtTimer.offset();
[all...]
H A Dufs_device.hh338 * responseUPIUOffset: response UPIU offset DW-6
340 * PRDTableOffset: Physical region descriptor offset DW-7
386 uint64_t offset; member in struct:UFSHostDevice::SCSIReply
429 uint64_t offset; member in struct:UFSHostDevice::transferInfo
562 void readFlash(uint8_t* readaddr, uint64_t offset, uint32_t size);
568 void writeFlash(uint8_t* writeaddr, uint64_t offset, uint32_t size);
955 void manageWriteTransfer(uint8_t LUN, uint64_t offset, uint32_t
957 void manageReadTransfer(uint32_t size, uint32_t LUN, uint64_t offset,
/gem5/tests/test-progs/asmtest/src/riscv/isa/macros/scalar/
H A Dtest_macros.h218 #define TEST_LD_OP( testnum, inst, result, offset, base ) \
221 inst x30, offset(x1); \
224 #define TEST_ST_OP( testnum, load_inst, store_inst, result, offset, base ) \
228 store_inst x2, offset(x1); \
229 load_inst x30, offset(x1); \
232 #define TEST_LD_DEST_BYPASS( testnum, nop_cycles, inst, result, offset, base ) \
237 inst x30, offset(x1); \
246 #define TEST_LD_SRC1_BYPASS( testnum, nop_cycles, inst, result, offset, base ) \
252 inst x30, offset(x1); \
259 #define TEST_ST_SRC12_BYPASS( testnum, src1_nops, src2_nops, load_inst, store_inst, result, offset, bas
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/gem5/src/arch/arm/insts/
H A Dmacromem.cc422 IntRegIndex base, IntRegIndex offset,
433 offset, type, imm);
436 offset, type, imm);
439 offset, type, imm);
765 for (unsigned offset = 0; offset < regs; offset++) {
771 machInst, (vd + offset) * 2, ufp0, inc * 2);
775 machInst, (vd + offset) * 2, ufp0, inc * 2, lane);
782 machInst, (vd + offset) *
420 BigFpMemRegOp(const char *mnem, ExtMachInst machInst, OpClass __opClass, bool load, IntRegIndex dest, IntRegIndex base, IntRegIndex offset, ArmExtendType type, int64_t imm) argument
1437 MacroVFPMemOp(const char *mnem, ExtMachInst machInst, OpClass __opClass, IntRegIndex rn, RegIndex vd, bool single, bool up, bool writeback, bool load, uint32_t offset) argument
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H A Dsve_macromem.hh57 IntRegIndex offset; member in class:ArmISA::SveLdStructSS
65 dest(_dest), gp(_gp), base(_base), offset(_offset), numregs(_numregs)
113 printIntReg(ss, offset);
128 IntRegIndex offset; member in class:ArmISA::SveStStructSS
136 dest(_dest), gp(_gp), base(_base), offset(_offset), numregs(_numregs)
185 printIntReg(ss, offset);
442 IntRegIndex offset; member in class:ArmISA::SveIndexedMemSV
455 dest(_dest), gp(_gp), base(_base), offset(_offset),
530 printVecReg(ss, offset, true);
/gem5/src/arch/hsail/
H A Doperand.hh594 int64_t offset; member in class:AddrOperandBase
634 // bits of the offset must be set to 0 in the BRIG
635 assert(!op->offset.hi);
637 * the offset field of an HSAIL instruction may be negative
641 offset = (int32_t)(op->offset.lo);
646 offset = (int64_t)(((uint64_t)(op->offset.hi) << 32)
647 | (uint64_t)(op->offset.lo));
762 return callArgs.at(idx)->offset;
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/gem5/src/dev/pci/
H A Dhost.cc141 DPRINTF(PciHost, "%02x:%02x.%i: read: offset=0x%x, size=0x%x\n",
164 DPRINTF(PciHost, "%02x:%02x.%i: write: offset=0x%x, size=0x%x\n",
189 const Addr offset(addr & mask(confDeviceBits));
196 offset);
/gem5/src/arch/sparc/
H A Disa.cc94 ISA::installWindow(int cwp, int offset) argument
96 assert(offset >= 0 && offset + NumWindowedRegs <= NumIntRegs);
97 RegIndex *mapChunk = intRegMap + offset;
104 ISA::installGlobals(int gl, int offset) argument
106 assert(offset >= 0 && offset + NumGlobalRegs <= NumIntRegs);
107 RegIndex *mapChunk = intRegMap + offset;
578 // use stick for offset and tick for holding intrrupt bit
H A Disa.hh163 void installWindow(int cwp, int offset);
164 void installGlobals(int gl, int offset);
/gem5/src/mem/
H A Daddr_mapper.cc232 Addr offset = addr - originalRanges[i].start(); local
233 return offset + remappedRanges[i].start();
/gem5/ext/libelf/
H A Dlibelf_ar.c56 * decimal number that corresponds to a byte offset into the string
167 size_t offset; local
173 * The value in field ar_name is a decimal offset into
178 &offset) == 0) {
183 if (offset > e->e_u.e_ar.e_rawstrtabsz) {
188 s = q = e->e_u.e_ar.e_rawstrtab + offset;
/gem5/src/arch/alpha/
H A Dvtophys.cc109 paddr = pte.paddr() | vaddr.offset();
/gem5/ext/systemc/src/sysc/qt/md/
H A Daxp.c47 then offset is set to 3 * 8 (8 === sizeof machine word) = 24.
84 #define _offset offset
/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64ui/
H A Dlb.S25 # Test with negative offset
H A Dlbu.S25 # Test with negative offset
H A Dld.S25 # Test with negative offset
H A Dlh.S25 # Test with negative offset
H A Dlhu.S25 # Test with negative offset
H A Dlw.S25 # Test with negative offset
H A Dlwu.S25 # Test with negative offset

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