/gem5/util/ |
H A D | regress | 131 mode) 135 for mode in modes 136 if not (build == 'SPARC' and test == 'quick' and mode == 'fs')]
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/gem5/src/arch/arm/ |
H A D | faults.cc | 198 // Fields: name, offset, cur{ELT,ELH}Offset, lowerEL{64,32}Offset, next mode, 302 assert(ArmSystem::haveSecurity(tc) || cpsr.mode != MODE_MON); 303 assert(ArmSystem::haveVirtualization(tc) || cpsr.mode != MODE_HYP); 305 switch (cpsr.mode) 428 // Determine source exception level and mode 429 fromMode = (OperatingMode) (uint8_t) cpsr.mode; 435 // mode (aarch32). 477 // Update fault state informations, like the starting mode (aarch32) 478 // or EL (aarch64) and the ending mode or EL. 480 // be handled in AArch64 mode (to6 679 OperatingMode64 mode = 0; local 850 OperatingMode mode = (OperatingMode)(uint8_t)cpsr.mode; local [all...] |
H A D | isa.cc | 109 // Initial rename mode depends on highestEL 139 // are in SE mode we don't know if our ArmProcess is 218 cpsr.mode = MODE_USER; 276 cpsr.mode = MODE_EL3H; 280 cpsr.mode = MODE_EL2H; 284 cpsr.mode = MODE_EL1H; 499 if (scr.ns && (cpsr.mode != MODE_MON) && ELIs32(tc, EL3)) { 524 if ((cpsr.mode == MODE_HYP) || inSecureState(scr, cpsr)) { 787 int old_mode = old_cpsr.mode; 789 if (old_mode != cpsr.mode || cps [all...] |
H A D | semihosting.cc | 285 const char *mode = argv[2] < fmodes.size() ? fmodes[argv[2]] : nullptr; local 289 name_base, argv[2], mode ? mode : "-", name_size); 290 if (!mode || !name_base) 296 FileBase::create(*this, fname, mode); 299 fname, argv[2], mode, ret); 696 const std::string &name, const char *mode) 700 FILE *f = fopen(name.c_str(), mode); 713 ArmSemihosting &parent, const std::string &fname, const char *mode) 717 file.reset(new FileFeatures(parent, fname.c_str(), mode)); 695 getSTDIO(const char *stream_name, const std::string &name, const char *mode) argument 712 create( ArmSemihosting &parent, const std::string &fname, const char *mode) argument [all...] |
H A D | stage2_mmu.hh | 91 BaseTLB::Mode mode);
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/gem5/src/arch/riscv/ |
H A D | tlb.cc | 368 TLB::translateAtomic(const RequestPtr &req, ThreadContext *tc, Mode mode) 370 if (mode == Execute) 373 return translateData(req, tc, mode == Write); 378 Translation *translation, Mode mode) 381 translation->finish(translateAtomic(req, tc, mode), req, tc, mode); 386 ThreadContext *tc, Mode mode) const
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/gem5/src/arch/x86/ |
H A D | types.hh | 182 Bitfield<3> mode; member in namespace:X86ISA 235 OperatingMode mode; member in struct:X86ISA::ExtMachInst 276 if (emi1.mode != emi2.mode) 367 emi.mode ^
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H A D | pagetable_walker.hh | 87 // Long mode 89 // PAE legacy mode 91 // Non PAE legacy mode with and without PSE 109 BaseTLB::Mode mode; member in class:X86ISA::Walker::WalkerState 148 // the case of multiple outstanding requests in timing mode) 163 const RequestPtr &req, BaseTLB::Mode mode); 165 unsigned &logBytes, BaseTLB::Mode mode);
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H A D | types.cc | 66 paramOut(cp, name + ".mode", (uint8_t)machInst.mode); 107 paramIn(cp, name + ".mode", temp8); 108 machInst.mode = temp8;
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H A D | faults.cc | 69 if (m5reg.mode == LongMode) { 81 if (m5reg.mode == LongMode) { 84 panic("Legacy mode interrupts with error codes " 151 if (m5reg.mode == LongMode) { 308 if (m5Reg.mode != LegacyMode || m5Reg.submode != RealMode) { 309 panic("Startup IPI recived outside of real mode. " 310 "Don't know what to do. %d, %d", m5Reg.mode, m5Reg.submode);
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/gem5/src/arch/arm/tracers/ |
H A D | tarmac_record.cc | 249 // Reading operating mode from CPSR. 253 OperatingMode mode = (OperatingMode)(uint8_t)cpsr.mode; local 256 if (mode != MODE_USER) { 257 reg_suffix = "_" + opModeToStr(mode); 420 opModeToStr(mode), /* Exception level */
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H A D | tarmac_base.hh | 97 ArmISA::OperatingMode mode; member in struct:Trace::TarmacBaseRecord::InstEntry
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/gem5/src/dev/x86/ |
H A D | i8259.cc | 42 mode(p->mode), slave(p->slave), 107 DPRINTF(I8259, "%s triggered mode.\n", 110 DPRINTF(I8259, "%s mode.\n", 123 "Subcommand: Rotate in auto-EOI mode (clear).\n"); 145 DPRINTF(I8259, "Subcommand: Rotate in auto-EOI mode (set).\n"); 164 DPRINTF(I8259, "%s special mask mode.\n", 194 if (mode == Enums::I8259Master) { 217 DPRINTF(I8259, "Special fully nested mode.\n"); 219 DPRINTF(I8259, "Not special fully nested mode [all...] |
H A D | i8259.hh | 53 Enums::X86I8259CascadeMode mode; member in class:X86ISA::I8259 78 // Whether or not the PIC is in auto EOI mode.
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/gem5/src/gpu-compute/ |
H A D | gpu_tlb.hh | 117 ThreadContext *tc, Mode mode) = 0; 183 Translation *translation, Mode mode, bool &delayedResponse, 226 Mode mode, int &latency); 229 Translation *translation, Mode mode, 251 TlbEntry *tlb_entry, Mode mode); 332 // TLB mode, read or write
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/gem5/src/arch/sparc/ |
H A D | tlb.hh | 54 // These faults need to be able to populate the tlb in SE mode. 172 const RequestPtr &req, ThreadContext *tc, Mode mode) override; 175 Translation *translation, Mode mode) override; 178 ThreadContext *tc, Mode mode) const override;
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/gem5/src/dev/ |
H A D | intel_8254_timer.hh | 53 Bitfield<3, 1> mode; member in class:Intel8254Timer 132 /** Current mode of operation */ 133 uint8_t mode; member in class:Intel8254Timer::Counter 159 /** Set the read/write mode */ 162 /** Set operational mode */
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/gem5/src/base/ |
H A D | output.hh | 119 std::ios_base::openmode mode, 128 /** File mode when opened */ 235 * @param mode attributes to open file with 243 std::ios_base::openmode mode,
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/gem5/src/systemc/core/ |
H A D | sc_main.cc | 90 sc_set_stop_mode(sc_stop_mode mode) argument 96 _stop_mode = mode;
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/gem5/src/arch/arm/insts/ |
H A D | vfp.hh | 62 setVfpMicroFlags(VfpMicroMode mode, T &flags) argument 64 switch (mode) { 79 if (mode == VfpMicroop || mode == VfpFirstMicroop) { 290 // There is no equivalent rounding mode, use round down and we'll 925 VfpMicroMode mode = VfpNotAMicroop) : 928 setVfpMicroFlags(mode, flags); 943 VfpMicroMode mode = VfpNotAMicroop) : 946 setVfpMicroFlags(mode, flags); 962 uint64_t _imm, VfpMicroMode mode [all...] |
/gem5/src/arch/alpha/ |
H A D | tlb.cc | 401 // only valid in kernel mode 454 mode_type mode = local 470 mode = (req->getFlags() & AlphaRequestFlags::ALTMODE) ? 492 // only valid in kernel mode 540 if (!(entry->xwe & MODE2MASK(mode))) { 558 if (!(entry->xre & MODE2MASK(mode))) { 602 TLB::translateAtomic(const RequestPtr &req, ThreadContext *tc, Mode mode) argument 604 if (mode == Execute) 607 return translateData(req, tc, mode == Write); 612 Translation *translation, Mode mode) 611 translateTiming(const RequestPtr &req, ThreadContext *tc, Translation *translation, Mode mode) argument 615 translation->finish(translateAtomic(req, tc, mode), req, tc, mode); local [all...] |
H A D | kernel_stats.hh | 87 void mode(cpu_mode newmode, ThreadContext *tc);
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/gem5/src/cpu/simple/ |
H A D | timing.cc | 204 "'timing' mode.\n"); 430 BaseTLB::Mode mode = BaseTLB::Read; 455 NULL, mode); 461 thread->dtb->translateTiming(req1, thread->getTC(), trans1, mode); 462 thread->dtb->translateTiming(req2, thread->getTC(), trans2, mode); 465 new WholeTranslationState(req, new uint8_t[size], NULL, mode); 468 thread->dtb->translateTiming(req, thread->getTC(), translation, mode); 508 BaseTLB::Mode mode = BaseTLB::Write; 544 new WholeTranslationState(req, req1, req2, newData, res, mode); 550 thread->dtb->translateTiming(req1, thread->getTC(), trans1, mode); [all...] |
/gem5/src/systemc/ext/core/ |
H A D | sc_main.hh | 70 void sc_set_stop_mode(sc_stop_mode mode);
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/gem5/src/sim/ |
H A D | fd_array.hh | 121 int openFile(std::string const& file_name, int flags, mode_t mode) const;
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