Searched refs:memory (Results 101 - 107 of 107) sorted by relevance
12345
/gem5/src/cpu/kvm/ |
H A D | x86_cpu.cc | 37 #include <memory> 566 // reserved in the e820 memory map in that case.
|
/gem5/src/dev/net/ |
H A D | ns_gige.cc | 40 #include <memory>
|
H A D | i8254xGBe.cc | 45 #include <memory> 176 panic("Invalid PCI memory access to unmapped memory.\n"); 365 panic("Invalid PCI memory access to unmapped memory.\n"); 1358 DPRINTF(EthernetDesc, "Packet written to memory updating Descriptor\n"); 2294 DPRINTF(EthernetSM, "RXS: Packet completed DMA to memory\n"); 2384 DPRINTF(EthernetSM, "RXS: Writing packet into memory\n");
|
/gem5/src/arch/arm/ |
H A D | tlb.cc | 47 #include <memory> 636 // strongly ordered memory 822 // strongly ordered memory 859 // both reads and writes from a memory location. From a ISS point 1107 // Set memory attributes 1127 DPRINTF(TLBVerbose, "(No MMU) setting memory attributes: shareable: " 1150 // Set memory attributes 1152 "Setting memory attributes: shareable: %d, innerAttrs: %d, " 1162 // strongly ordered or device memory (i.e., anything other 1163 // than normal memory require [all...] |
H A D | table_walker.cc | 42 #include <memory> 1264 // LPAE always uses remapping of memory attributes, irrespective of the 1275 // Note: the memory subsystem only cares about the 'cacheable' memory 1282 // Strongly-ordered or Device memory 1293 // Normal memory, Outer Non-cacheable 1315 // Normal memory, Outer Cacheable 1384 // Treat write-through memory as uncacheable, this is safe 1422 if (te.mtype == TlbEntry::MemoryType::Device) { // Device memory 1425 // Treat write-through memory a [all...] |
/gem5/src/base/ |
H A D | statistics.hh | 74 #include <memory>
|
/gem5/src/sim/ |
H A D | syscall_emul.hh | 88 #include <memory> 364 * The value in memory at uaddr is not equal with the expected val 537 //// memory space. Used by stat(), fstat(), and lstat(). 773 * Retrieve the simulated process' memory proxy and then read in the path 774 * string from that memory space into the host's working memory space. 1768 // memory areas are shared. If that structure existed, it would be 1844 // Allocate physical memory and map it in. If the page table is already 1859 // there's no danger of remapping used memory, so for now all 1860 // newly mapped memory shoul [all...] |
Completed in 49 milliseconds
12345