Searched refs:Tick (Results 76 - 100 of 407) sorted by relevance
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/gem5/src/cpu/ |
H A D | inteltrace.hh | 48 IntelTraceRecord(Tick _when, ThreadContext *_thread, 67 getInstRecord(Tick when, ThreadContext *tc,
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/gem5/src/mem/ruby/structures/ |
H A D | BankedArray.hh | 55 Tick startAccess; 56 Tick endAccess;
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H A D | PseudoLRUPolicy.hh | 56 void touch(int64_t set, int64_t way, Tick time);
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H A D | LRUPolicy.hh | 44 void touch(int64_t set, int64_t way, Tick time);
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H A D | TimerTable.hh | 58 bool isReady(Tick curTime) const; 61 void set(Addr address, Tick ready_time); 76 typedef std::map<Addr, Tick> AddressMap; 79 mutable Tick m_next_time; // Only valid if m_next_valid is true
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/gem5/src/dev/mips/ |
H A D | malta_cchip.hh | 97 Tick read(PacketPtr pkt) override; 99 Tick write(PacketPtr pkt) override;
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/gem5/src/cpu/kvm/ |
H A D | timer.cc | 79 float hostFactor, Tick hostFreq) 102 PosixKvmTimer::arm(Tick ticks) 133 Tick 150 const Tick resolution(ticksFromHostNs(res_ns) + 1); 155 const Tick min_cycles(ticksFromHostCycles(MIN_HOST_CYCLES)); 162 int signo, float hostFactor, Tick hostFreq) 174 PerfKvmTimer::arm(Tick ticks) 186 Tick
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/gem5/src/mem/cache/ |
H A D | mshr_queue.hh | 100 Tick when_ready, Counter order, bool alloc_on_fill); 116 void delay(MSHR *mshr, Tick delay_ticks);
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H A D | write_queue.hh | 87 PacketPtr pkt, Tick when_ready, Counter order);
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/gem5/src/arch/arm/tracers/ |
H A D | TarmacTrace.py | 73 start_tick = Param.Tick(0, 76 end_tick = Param.Tick(MaxTick,
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/gem5/src/dev/net/ |
H A D | etherswitch.hh | 75 uint64_t outputBufferSize, Tick delay, Tick delay_var, 87 Tick switchingDelay(); 97 const Tick switchDelay; 98 const Tick delayVar; 105 PortFifoEntry(EthPacketPtr pkt, Tick recv_tick, unsigned id) 109 Tick recvTick; 181 Tick lastUseTime;
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/gem5/src/gpu-compute/ |
H A D | tlb_coalescer.hh | 150 Tick frequency() const { return SimClock::Frequency / clock; } 151 Tick ticks(int numCycles) const { return (Tick)clock * numCycles; } 152 Tick curCycle() const { return curTick() / clock; } 153 Tick tickToCycles(Tick val) const { return val / clock;} 168 virtual Tick recvAtomic(PacketPtr pkt) { return 0; } 197 virtual Tick recvAtomic(PacketPtr pkt) { return 0; }
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/gem5/src/mem/ |
H A D | comm_monitor.hh | 107 CommMonitorSenderState(Tick _transmitTime) 114 /** Tick when request is transmitted */ 115 Tick transmitTime; 141 Tick recvAtomicSnoop(PacketPtr pkt) 207 Tick recvAtomic(PacketPtr pkt) 250 Tick recvAtomic(PacketPtr pkt); 252 Tick recvAtomicSnoop(PacketPtr pkt); 330 Tick timeOfLastRead; 331 Tick timeOfLastWrite; 332 Tick timeOfLastRe [all...] |
H A D | tport.hh | 83 virtual Tick recvAtomic(PacketPtr pkt) = 0;
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H A D | simple_mem.cc | 73 Tick 83 Tick 86 Tick latency = recvAtomic(pkt); 137 Tick receive_delay = pkt->headerDelay + pkt->payloadDelay; 147 Tick duration = pkt->getSize() * bandwidth; 167 Tick when_to_send = curTick() + receive_delay + getLatency(); 229 Tick 233 (latency_var ? random_mt.random<Tick>(0, latency_var) : 0); 278 Tick 284 Tick [all...] |
/gem5/src/dev/arm/ |
H A D | timer_sp804.hh | 89 const Tick clock; 114 Timer(std::string __name, Sp804 *parent, int int_num, Tick clock); 153 Tick read(PacketPtr pkt) override; 160 Tick write(PacketPtr pkt) override;
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/gem5/src/cpu/testers/traffic_gen/ |
H A D | base_gen.cc | 54 BaseGen::BaseGen(SimObject &obj, MasterID master_id, Tick _duration) 84 MasterID master_id, Tick _duration, 87 Tick min_period, Tick max_period,
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/gem5/util/systemc/gem5_within_systemc/ |
H A D | sc_logger.hh | 72 void logMessage(Tick when, const std::string &name,
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H A D | sc_module.cc | 95 Module::SCEventQueue::wakeup(Tick when) 118 Tick systemc_time = sc_core::sc_time_stamp().value(); 119 Tick gem5_time = curTick(); 128 Tick next_event_time M5_VAR_USED = eventq->nextTick(); 152 Tick systemc_time = sc_core::sc_time_stamp().value(); 205 Tick next_event_time = eventq->nextTick(); 210 Tick gem5_time = curTick(); 219 Tick wait_period = next_event_time - gem5_time; 232 Tick systemc_time = sc_core::sc_time_stamp().value(); 253 Module::simulate(Tick num_cycle [all...] |
/gem5/util/systemc/systemc_within_gem5/systemc_simple_object/ |
H A D | feeder.hh | 58 Tick delay;
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/gem5/src/mem/cache/prefetch/ |
H A D | multi.hh | 56 Tick nextPrefetchReadyTime() const override;
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/gem5/src/dev/x86/ |
H A D | cmos.hh | 45 Tick latency; 62 bool bcd, Tick frequency, int int_pin_count) : 94 Tick read(PacketPtr pkt) override; 96 Tick write(PacketPtr pkt) override;
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/gem5/src/sim/ |
H A D | global_event.hh | 126 void schedule(Tick when); 138 Tick when() const 145 void reschedule(Tick when); 193 GlobalEvent(Tick when, Priority p, Flags f) 225 GlobalSyncEvent(Tick when, Tick _repeat, Priority p, Flags f) 235 Tick repeat;
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/gem5/src/cpu/o3/probe/ |
H A D | elastic_trace.hh | 207 Tick executeTick; 212 Tick toCommitTick; 269 /* Tick when instruction was in execute stage. */ 270 Tick executeTick; 271 /* Tick when instruction was marked ready and sent to commit stage. */ 272 Tick toCommitTick; 273 /* Tick when instruction was committed. */ 274 Tick commitTick; 317 * @return Tick when instruction was executed 319 Tick getExecuteTic [all...] |
/gem5/src/dev/ |
H A D | mc146818.hh | 54 Tick interval; 55 Tick offset; 57 RTCEvent(MC146818 * _parent, Tick i); 73 Tick offset; 155 bool bcd, Tick frequency);
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Completed in 29 milliseconds
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