| /gem5/src/dev/net/ |
| H A D | etherlink.hh | 84 const Tick linkDelay;
85 const Tick delayVar;
101 std::deque<std::pair<Tick, EthPacketPtr>> txQueue;
110 double rate, Tick delay, Tick delay_var, EtherDump *dump);
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| H A D | ns_gige.hh | 236 Tick dmaReadDelay;
237 Tick dmaWriteDelay;
239 Tick dmaReadFactor;
240 Tick dmaWriteFactor;
270 Tick txDelay;
271 Tick rxDelay;
278 Tick rxKickTick;
282 Tick txKickTick;
321 Tick intrDelay;
322 Tick intrTic
[all...] |
| /gem5/src/mem/ |
| H A D | bridge.hh | 87 const Tick tick;
90 DeferredPacket(PacketPtr _pkt, Tick _tick) : tick(_tick), pkt(_pkt)
185 void schedTimingResp(PacketPtr pkt, Tick when);
206 Tick recvAtomic(PacketPtr pkt);
289 void schedTimingReq(PacketPtr pkt, Tick when);
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| H A D | serial_link.hh | 83 const Tick tick;
86 DeferredPacket(PacketPtr _pkt, Tick _tick) : tick(_tick), pkt(_pkt)
177 void schedTimingResp(PacketPtr pkt, Tick when);
198 Tick recvAtomic(PacketPtr pkt);
282 void schedTimingReq(PacketPtr pkt, Tick when);
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| H A D | mem_delay.cc | 92 const Tick when = curTick() + parent.delayResp(pkt);
109 Tick
112 const Tick delay = parent.delaySnoopResp(pkt);
130 Tick
133 const Tick delay = parent.delayReq(pkt) + parent.delayResp(pkt);
141 const Tick when = curTick() + parent.delayReq(pkt);
161 const Tick when = curTick() + parent.delaySnoopResp(pkt);
179 Tick
191 Tick
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| /gem5/src/cpu/testers/traffic_gen/ |
| H A D | base.cc | 140 Tick nextEvent = updateEvent.scheduled() ? updateEvent.when() : 0;
158 Tick nextEvent;
238 const Tick duration = activeGenerator->duration;
272 const Tick nextEventTick = std::min(nextPacketTick, nextTransitionTick);
310 Tick delay = curTick() - retryPktTick;
360 BaseTrafficGen::createIdle(Tick duration)
366 BaseTrafficGen::createExit(Tick duration)
372 BaseTrafficGen::createLinear(Tick duration,
374 Tick min_period, Tick max_perio
[all...] |
| /gem5/src/mem/ruby/network/ |
| H A D | MessageBuffer.cc | 69 MessageBuffer::getSize(Tick curTime)
80 MessageBuffer::areNSlotsAvailable(unsigned int n, Tick current_time)
138 Tick
141 Tick time = 1;
150 MessageBuffer::enqueue(MsgPtr message, Tick current_time, Tick delta)
164 Tick arrival_time = 0;
225 Tick
226 MessageBuffer::dequeue(Tick current_time, bool decrement_messages)
236 Tick dela
[all...] |
| /gem5/src/dev/arm/ |
| H A D | flash_device.hh | 91 Tick time;
138 Tick remap(uint64_t logic_page_addr);
141 Tick accessTimes(uint64_t address, Actions accesstype);
161 const Tick readLatency;
162 const Tick writeLatency;
163 const Tick eraseLatency;
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| H A D | amba_device.hh | 93 Tick intDelay;
106 Tick pioDelay;
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| H A D | amba_fake.cc | 55 Tick
72 Tick
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| /gem5/src/base/ |
| H A D | trace.hh | 60 void dprintf(Tick when, const std::string &name, const char *fmt,
72 virtual void dump(Tick when, const std::string &name,
76 virtual void logMessage(Tick when, const std::string &name,
106 void logMessage(Tick when, const std::string &name,
194 Trace::getDebugLogger()->dprintf((Tick)-1, std::string(), \
208 Trace::getDebugLogger()->dprintf((Tick)-1, string(), __VA_ARGS__); \
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| /gem5/src/cpu/kvm/ |
| H A D | base.hh | 280 virtual Tick kvmRun(Tick ticks);
293 virtual Tick kvmRunDrain();
444 virtual Tick handleKvmExit();
451 virtual Tick handleKvmExitIO();
458 virtual Tick handleKvmExitHypercall();
469 virtual Tick handleKvmExitIRQWindowOpen();
483 virtual Tick handleKvmExitUnknown();
494 virtual Tick handleKvmExitException();
504 virtual Tick handleKvmExitFailEntr
[all...] |
| /gem5/src/arch/alpha/ |
| H A D | system.hh | 93 Tick intrFreq;
127 void setIntrFreq(Tick freq) { intrFreq = freq; }
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| /gem5/src/cpu/ |
| H A D | exetrace.hh | 50 ExeTracerRecord(Tick _when, ThreadContext *_thread,
71 getInstRecord(Tick when, ThreadContext *tc,
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| /gem5/src/dev/alpha/ |
| H A D | backdoor.hh | 115 Tick read(PacketPtr pkt) override;
116 Tick write(PacketPtr pkt) override;
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| H A D | tsunami_cchip.hh | 95 Tick read(PacketPtr pkt) override;
97 Tick write(PacketPtr pkt) override;
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| /gem5/src/dev/i2c/ |
| H A D | bus.hh | 147 Tick read(PacketPtr pkt) override;
148 Tick write(PacketPtr pkt) override;
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| /gem5/src/dev/virtio/ |
| H A D | pci.hh | 56 Tick read(PacketPtr pkt);
57 Tick write(PacketPtr pkt);
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| /gem5/src/mem/ruby/profiler/ |
| H A D | StoreTrace.hh | 65 Tick m_first_store;
66 Tick m_last_store;
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| /gem5/src/mem/ruby/structures/ |
| H A D | LRUPolicy.cc | 51 LRUPolicy::touch(int64_t set, int64_t index, Tick time)
62 Tick time, smallest_time;
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| /gem5/src/dev/serial/ |
| H A D | simple.cc | 54 Tick
70 Tick
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| /gem5/src/dev/sparc/ |
| H A D | dtod.cc | 61 Tick
74 Tick
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| /gem5/src/mem/cache/prefetch/ |
| H A D | multi.cc | 58 Tick
61 Tick next_ready = MaxTick;
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| /gem5/src/sim/ |
| H A D | eventq.hh | 63 extern Tick simQuantum;
209 Tick _when; //!< timestamp when event should be processed
229 Tick whenCreated; //!< time created
230 Tick whenScheduled; //!< time scheduled
234 setWhen(Tick when, EventQueue *q)
401 Tick when() const { return _when; }
497 Tick _curTick;
615 void schedule(Event *event, Tick when, bool global = false);
623 void reschedule(Event *event, Tick when, bool always = false);
625 Tick nextTic
676 wakeup(Tick when = (Tick)-1) argument
779 wakeupEventQueue(Tick when = (Tick)-1) argument
[all...] |
| /gem5/src/dev/pci/ |
| H A D | device.hh | 171 virtual Tick writeConfig(PacketPtr pkt);
180 virtual Tick readConfig(PacketPtr pkt);
185 Tick pioDelay;
186 Tick configDelay;
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