/gem5/src/arch/power/ |
H A D | interrupts.cc | 33 PowerISA::Interrupts * 36 return new PowerISA::Interrupts(this);
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H A D | decoder.cc | 33 namespace PowerISA namespace
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H A D | microcode_rom.hh | 38 namespace PowerISA namespace 43 } // namespace PowerISA
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H A D | isa.cc | 42 #include "params/PowerISA.hh" 44 namespace PowerISA namespace 61 PowerISA::ISA * 64 return new PowerISA::ISA(this);
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H A D | PowerISA.py | 40 class PowerISA(SimObject): class in inherits:SimObject 41 type = 'PowerISA' 42 cxx_class = 'PowerISA::ISA'
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H A D | mmapped_ipr.hh | 48 namespace PowerISA namespace 52 } // namespace PowerISA
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H A D | pseudo_inst.hh | 39 namespace PowerISA { namespace
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H A D | vtophys.cc | 36 PowerISA::vtophys(Addr vaddr) 42 PowerISA::vtophys(ThreadContext *tc, Addr addr)
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H A D | kernel_stats.hh | 36 namespace PowerISA { namespace 46 } // namespace PowerISA::Kernel 47 } // namespace PowerISA
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H A D | types.hh | 38 namespace PowerISA namespace 89 } // PowerISA namespace 94 struct hash<PowerISA::ExtMachInst> : public hash<uint32_t> { 95 size_t operator()(const PowerISA::ExtMachInst &emi) const {
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H A D | faults.hh | 38 namespace PowerISA namespace 88 } // namespace PowerISA
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H A D | vtophys.hh | 44 namespace PowerISA { namespace 55 } // namespace PowerISA
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H A D | pagetable.hh | 45 namespace PowerISA { namespace 92 return PowerISA::PteAddr(addr >> PageShift); 98 return PowerISA::PteAddr(addr >> (NPtePageShift + PageShift)); 104 return PowerISA::PteAddr(addr >> (2 * NPtePageShift + PageShift)); 153 } // namespace PowerISA
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H A D | tlb.hh | 53 namespace PowerISA { namespace 105 PowerISA::PTE *table; // the Page Table 117 PowerISA::PTE *lookup(Addr vpn, uint8_t asn) const; 139 PowerISA::PTE *getEntry(unsigned) const; 149 PowerISA::PTE &index(bool advance = true); 150 void insert(Addr vaddr, PowerISA::PTE &pte); 151 void insertAt(PowerISA::PTE &pte, unsigned Index, int _smallPages); 181 } // namespace PowerISA
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H A D | tlb.cc | 58 using namespace PowerISA; 70 table = new PowerISA::PTE[size]; 71 memset(table, 0, sizeof(PowerISA::PTE[size])); 82 PowerISA::PTE * 86 PowerISA::PTE *retval = NULL; 91 PowerISA::PTE *pte = &table[index]; 111 PowerISA::PTE* 128 PowerISA::PTE *pte = &table[index]; 160 TLB::insertAt(PowerISA::PTE &pte, unsigned Index, int _smallPages) 184 TLB::insert(Addr addr, PowerISA [all...] |
H A D | decoder.hh | 38 namespace PowerISA namespace 113 decode(PowerISA::PCState &nextPC) 122 } // namespace PowerISA
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H A D | isa_traits.hh | 44 namespace PowerISA namespace 69 } // namespace PowerISA
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/gem5/src/arch/power/insts/ |
H A D | floating.cc | 33 using namespace PowerISA;
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H A D | misc.cc | 33 using namespace PowerISA;
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H A D | misc.hh | 36 namespace PowerISA namespace 56 } // namespace PowerISA
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H A D | branch.cc | 36 using namespace PowerISA; 56 PowerISA::PCState 57 BranchPCRel::branchTarget(const PowerISA::PCState &pc) const 80 PowerISA::PCState 81 BranchNonPCRel::branchTarget(const PowerISA::PCState &pc) const 102 PowerISA::PCState 103 BranchPCRelCond::branchTarget(const PowerISA::PCState &pc) const 128 PowerISA::PCState 129 BranchNonPCRelCond::branchTarget(const PowerISA::PCState &pc) const 153 PowerISA [all...] |
H A D | branch.hh | 36 namespace PowerISA namespace 89 PowerISA::PCState branchTarget(const PowerISA::PCState &pc) const override; 119 PowerISA::PCState branchTarget(const PowerISA::PCState &pc) const override; 198 PowerISA::PCState branchTarget(const PowerISA::PCState &pc) const override; 228 PowerISA::PCState branchTarget(const PowerISA::PCState &pc) const override; 250 PowerISA [all...] |
H A D | static_inst.hh | 37 namespace PowerISA namespace 68 advancePC(PowerISA::PCState &pcState) const override 80 } // namespace PowerISA
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H A D | condition.cc | 33 using namespace PowerISA;
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H A D | mem.cc | 35 using namespace PowerISA;
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