Searched hist:9699 (Results 1 - 2 of 2) sorted by relevance
| /gem5/src/arch/x86/isa/microops/ | ||
| H A D | fpop.isa | 9699:76828cbe5de4 Tue May 21 12:33:00 EDT 2013 Nilay Vaish <nilay@cs.wisc.edu> x86: add op class for int and fp microops in isa description Currently all the integer microops are marked as IntAluOp and the floating point microops are marked as FloatAddOp. This patch adds support for marking different microops differently. Now IntMultOp, IntDivOp, FloatDivOp, FloatMultOp, FloatCvtOp, FloatSqrtOp classes will be used as well. This will help in providing different latencies for different op class. |
| H A D | regop.isa | 9699:76828cbe5de4 Tue May 21 12:33:00 EDT 2013 Nilay Vaish <nilay@cs.wisc.edu> x86: add op class for int and fp microops in isa description Currently all the integer microops are marked as IntAluOp and the floating point microops are marked as FloatAddOp. This patch adds support for marking different microops differently. Now IntMultOp, IntDivOp, FloatDivOp, FloatMultOp, FloatCvtOp, FloatSqrtOp classes will be used as well. This will help in providing different latencies for different op class. |
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