Searched hist:6825 (Results 1 - 8 of 8) sorted by relevance

/gem5/src/arch/x86/insts/
H A Dbadmicroop.cc12407:c24d0c2d816d Wed Dec 20 03:02:00 EST 2017 Gabe Black <gabeblack@google.com> riscv,x86: Stop using the arch Nop machine instruction unnecessarily.

That particular ExtMachInst is a convenient placeholder, but a value
of 0 in RISCV or a static uninitialized ExtMachInst (which will
therefore be all zeroes) on x86 works just as well, and removes the
need for an ISA specific constant.

Also, the idea of a universal Nop doesn't always make sense since it
could be that what, exactly, doesn't do anything depends on context
which would be lost on a constant value of an ExtMachInst. For
instance, the value of an ExtMachInst that makes sense might depend on
what mode the CPU was in, etc.

Change-Id: I1f1a43a5c607a667e11b79bcf6e059e4f7141b3f
Reviewed-on: https://gem5-review.googlesource.com/6825
Reviewed-by: Gabe Black <gabeblack@google.com>
Reviewed-by: Alec Roelke <ar4jc@virginia.edu>
Maintainer: Gabe Black <gabeblack@google.com>
/gem5/src/arch/riscv/
H A Ddecoder.cc12407:c24d0c2d816d Wed Dec 20 03:02:00 EST 2017 Gabe Black <gabeblack@google.com> riscv,x86: Stop using the arch Nop machine instruction unnecessarily.

That particular ExtMachInst is a convenient placeholder, but a value
of 0 in RISCV or a static uninitialized ExtMachInst (which will
therefore be all zeroes) on x86 works just as well, and removes the
need for an ISA specific constant.

Also, the idea of a universal Nop doesn't always make sense since it
could be that what, exactly, doesn't do anything depends on context
which would be lost on a constant value of an ExtMachInst. For
instance, the value of an ExtMachInst that makes sense might depend on
what mode the CPU was in, etc.

Change-Id: I1f1a43a5c607a667e11b79bcf6e059e4f7141b3f
Reviewed-on: https://gem5-review.googlesource.com/6825
Reviewed-by: Gabe Black <gabeblack@google.com>
Reviewed-by: Alec Roelke <ar4jc@virginia.edu>
Maintainer: Gabe Black <gabeblack@google.com>
/gem5/src/arch/x86/isa/microops/
H A Dbase.isa12407:c24d0c2d816d Wed Dec 20 03:02:00 EST 2017 Gabe Black <gabeblack@google.com> riscv,x86: Stop using the arch Nop machine instruction unnecessarily.

That particular ExtMachInst is a convenient placeholder, but a value
of 0 in RISCV or a static uninitialized ExtMachInst (which will
therefore be all zeroes) on x86 works just as well, and removes the
need for an ISA specific constant.

Also, the idea of a universal Nop doesn't always make sense since it
could be that what, exactly, doesn't do anything depends on context
which would be lost on a constant value of an ExtMachInst. For
instance, the value of an ExtMachInst that makes sense might depend on
what mode the CPU was in, etc.

Change-Id: I1f1a43a5c607a667e11b79bcf6e059e4f7141b3f
Reviewed-on: https://gem5-review.googlesource.com/6825
Reviewed-by: Gabe Black <gabeblack@google.com>
Reviewed-by: Alec Roelke <ar4jc@virginia.edu>
Maintainer: Gabe Black <gabeblack@google.com>
/gem5/src/mem/ruby/system/
H A DDMASequencer.hh6825:104115ebc206 Fri Aug 21 16:52:00 EDT 2009 pdudnik@gmail.com [mq]: first_patch
H A DSequencer.hh6825:104115ebc206 Fri Aug 21 16:52:00 EDT 2009 pdudnik@gmail.com [mq]: first_patch
H A DRubyPort.hh6825:104115ebc206 Fri Aug 21 16:52:00 EDT 2009 pdudnik@gmail.com [mq]: first_patch
H A DSequencer.cc6825:104115ebc206 Fri Aug 21 16:52:00 EDT 2009 pdudnik@gmail.com [mq]: first_patch
/gem5/util/
H A Dstyle.py6825:104115ebc206 Fri Aug 21 16:52:00 EDT 2009 pdudnik@gmail.com [mq]: first_patch

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