Searched hist:6811 (Results 1 - 7 of 7) sorted by relevance
| /gem5/src/arch/riscv/insts/ | ||
| H A D | compressed.cc | 12369:6811cd264242 Fri Nov 10 15:46:00 EST 2017 Alec Roelke <ar4jc@virginia.edu> arch-riscv: Move compressed ops out of ISA This patch moves static portions of the compressed instruction definitions out of the ISA generated code. Change-Id: I61daae8b8c03a9e0f012790a132aa4d34a6ec296 Reviewed-on: https://gem5-review.googlesource.com/6026 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Alec Roelke <ar4jc@virginia.edu> |
| H A D | compressed.hh | 12369:6811cd264242 Fri Nov 10 15:46:00 EST 2017 Alec Roelke <ar4jc@virginia.edu> arch-riscv: Move compressed ops out of ISA This patch moves static portions of the compressed instruction definitions out of the ISA generated code. Change-Id: I61daae8b8c03a9e0f012790a132aa4d34a6ec296 Reviewed-on: https://gem5-review.googlesource.com/6026 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Alec Roelke <ar4jc@virginia.edu> |
| H A D | SConscript | 12369:6811cd264242 Fri Nov 10 15:46:00 EST 2017 Alec Roelke <ar4jc@virginia.edu> arch-riscv: Move compressed ops out of ISA This patch moves static portions of the compressed instruction definitions out of the ISA generated code. Change-Id: I61daae8b8c03a9e0f012790a132aa4d34a6ec296 Reviewed-on: https://gem5-review.googlesource.com/6026 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Alec Roelke <ar4jc@virginia.edu> |
| /gem5/src/arch/riscv/isa/formats/ | ||
| H A D | compressed.isa | 12369:6811cd264242 Fri Nov 10 15:46:00 EST 2017 Alec Roelke <ar4jc@virginia.edu> arch-riscv: Move compressed ops out of ISA This patch moves static portions of the compressed instruction definitions out of the ISA generated code. Change-Id: I61daae8b8c03a9e0f012790a132aa4d34a6ec296 Reviewed-on: https://gem5-review.googlesource.com/6026 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Alec Roelke <ar4jc@virginia.edu> |
| /gem5/src/arch/riscv/isa/ | ||
| H A D | includes.isa | 12369:6811cd264242 Fri Nov 10 15:46:00 EST 2017 Alec Roelke <ar4jc@virginia.edu> arch-riscv: Move compressed ops out of ISA This patch moves static portions of the compressed instruction definitions out of the ISA generated code. Change-Id: I61daae8b8c03a9e0f012790a132aa4d34a6ec296 Reviewed-on: https://gem5-review.googlesource.com/6026 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Alec Roelke <ar4jc@virginia.edu> |
| /gem5/src/arch/mips/ | ||
| H A D | process.hh | 6811:f130ea67e453 Thu Dec 31 15:30:00 EST 2009 Matt DeVuyst MIPS: Beef up process initialization. |
| H A D | process.cc | 6811:f130ea67e453 Thu Dec 31 15:30:00 EST 2009 Matt DeVuyst MIPS: Beef up process initialization. |
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