Searched hist:67 (Results 176 - 184 of 184) sorted by relevance
| /gem5/src/cpu/o3/ | ||
| H A D | inst_queue_impl.hh | 14136:67b0ce25b683 Mon Aug 05 21:45:00 EDT 2019 Jordi Vaquero <jordi.vaquero@metempsy.com> cpu-o3: fix atomic instructions non-speculative Fix problem with O3 and AMO instructions. At initial stages amo instruction is considered a type of non-speculative store. After the instruction has been commited and during the squash step, acquire_release version of the AMO operation is considered speculative, that differents results in an assert fault. This fix ensures that AMO instructions are always considered non-speculative, during early stages and during squas/removal of the instruction. Change-Id: Ia0c5fbb9dc44a9991337b57eb759b1ed08e4149e Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19815 Maintainer: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Tested-by: kokoro <noreply+kokoro@google.com> |
| H A D | cpu.cc | 9461:67a6ba6604c8 Sat Jan 12 23:09:00 EST 2013 Nilay Vaish <nilay@cs.wisc.edu> x86: Changes to decoder, corrects 9376 The changes made by the changeset 9376 were not quite correct. The patch made changes to the code which resulted in decoder not getting initialized correctly when the state was restored from a checkpoint. This patch adds a startup function to each ISA object. For x86, this function sets the required state in the decoder. For other ISAs, the function is empty right now. 5639:67cc7f0427e7 Sat Oct 11 05:27:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> CPU: Eliminate the hwrei function. |
| /gem5/src/cpu/checker/ | ||
| H A D | cpu.hh | 5639:67cc7f0427e7 Sat Oct 11 05:27:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> CPU: Eliminate the hwrei function. |
| /gem5/src/cpu/simple/ | ||
| H A D | base.cc | 9461:67a6ba6604c8 Sat Jan 12 23:09:00 EST 2013 Nilay Vaish <nilay@cs.wisc.edu> x86: Changes to decoder, corrects 9376 The changes made by the changeset 9376 were not quite correct. The patch made changes to the code which resulted in decoder not getting initialized correctly when the state was restored from a checkpoint. This patch adds a startup function to each ISA object. For x86, this function sets the required state in the decoder. For other ISAs, the function is empty right now. |
| H A D | timing.cc | 7520:67c670459d01 Fri Aug 13 09:16:00 EDT 2010 Gabe Black <gblack@eecs.umich.edu> CPU: Add readBytes and writeBytes functions to the exec contexts. |
| H A D | atomic.cc | 7520:67c670459d01 Fri Aug 13 09:16:00 EDT 2010 Gabe Black <gblack@eecs.umich.edu> CPU: Add readBytes and writeBytes functions to the exec contexts. |
| /gem5/src/sim/ | ||
| H A D | syscall_emul.hh | 6689:67d980fcbc7a Sat Oct 24 13:53:00 EDT 2009 Timothy M. Jones <tjones1@inf.ed.ac.uk> syscall: Addition of an ioctl command code for Power. |
| /gem5/src/cpu/ | ||
| H A D | base.cc | 11325:67cc559d513a Sat Feb 06 20:21:00 EST 2016 Steve Reinhardt <steve.reinhardt@amd.com> style: eliminate explicit boolean comparisons Result of running 'hg m5style --skip-all --fix-control -a' to get rid of '== true' comparisons, plus trivial manual edits to get rid of '== false'/'== False' comparisons. Left a couple of explicit comparisons in where they didn't seem unreasonable: invalid boolean comparison in src/arch/mips/interrupts.cc:155 >> DPRINTF(Interrupt, "Interrupts OnCpuTimerINterrupt(tc) == true\n");<< invalid boolean comparison in src/unittest/unittest.hh:110 >> "EXPECT_FALSE(" #expr ")", (expr) == false)<< |
| H A D | base_dyn_inst.hh | 7520:67c670459d01 Fri Aug 13 09:16:00 EDT 2010 Gabe Black <gblack@eecs.umich.edu> CPU: Add readBytes and writeBytes functions to the exec contexts. |
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