Searched hist:4620 (Results 1 - 2 of 2) sorted by relevance
| /gem5/src/arch/x86/isa/ | ||
| H A D | microasm.isa | 4620:5acc50eeacf7 Thu Jun 21 16:35:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> Make symbols for regular registers. |
| /gem5/src/cpu/o3/ | ||
| H A D | lsq_unit.hh | 12171:b11b56bba18f Mon Aug 28 16:32:00 EDT 2017 Matthias Hille <matthiashille8@gmail.com> cpu-o3: fix data pkt initialization for split load When a split load hits a memory region where IPRs are mapped, the Writebackevent which is scheduled for that was carrying a data packet that was not correctly initialized which caused an assertion to fire when the Writeback event is processed. Change-Id: I71a4e291f0086f7468d7e8124a0a8f098088972f Signed-off-by: Matthias Hille <matthiashille8@gmail.com> Reported-by: Matthias Hille <matthiashille8@gmail.com> Reviewed-on: https://gem5-review.googlesource.com/4620 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
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