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| /gem5/src/arch/sparc/ | ||
| H A D | registers.hh | 13386:3447b3202bb1 Fri Oct 12 20:48:00 EDT 2018 Gabe Black <gabeblack@google.com> sparc: Switch the FloatReg and FloatRegBits types to be 64 bit. These types aren't used by the ISA itself since they're defined to be particular primitive types in the ISA description. This just affects code outside of the ISA which work with those types of registers. Change-Id: I4f62ab8fe04184cc23845090c82b250145a71747 Reviewed-on: https://gem5-review.googlesource.com/c/13616 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> |
| /gem5/configs/common/ | ||
| H A D | Simulation.py | 3447:258e3c319f6f Mon Oct 30 14:19:00 EST 2006 Lisa Hsu <hsul@eecs.umich.edu> ensure that there is a "/" between the cptdir and the cpt.%d. |
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