Searched hist:3263 (Results 1 - 2 of 2) sorted by relevance
| /gem5/src/dev/arm/ | ||
| H A D | rv_ctrl.cc | 12078:6bbedad2eb30 Thu Feb 23 15:52:00 EST 2017 Gedare Bloom <gedare@rtems.org> arm: ignore writes to the reset_ctl register Change-Id: I953521572e6ace475b656369c9f07ddfa50d731a Signed-off-by: Gedare Bloom <gedare@rtems.org> Reviewed-on: https://gem5-review.googlesource.com/3263 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| /gem5/src/mem/ | ||
| H A D | tport.cc | 3263:e532da529c9f Wed Oct 11 19:25:00 EDT 2006 Ron Dreslinski <rdreslin@umich.edu> Fix bus in FS mode. src/mem/bus.cc: Add debugging statement src/mem/bus.hh: Fix implementation of bus for subsequent recvTimings while handling a retry request. src/mem/tport.cc: Rework timing port to retry properly |
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