Searched hist:2015 (Results 251 - 275 of 1505) sorted by relevance

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/gem5/ext/sst/
H A DREADME10779:3e986011e99e Wed Apr 08 16:56:00 EDT 2015 Curtis Dunham <Curtis.Dunham@arm.com> ext: Add SST connector

This patch adds a connector that allows gem5 to be used as a component
in SST (Structural Simulation Toolkit, sst-simulator.org). At a high
level, this allows memory traffic to pass between the two simulators.
SST Links are roughly analogous to gem5 Ports, although Links do not
have a notion of master and slave. This distinction is important to
gem5, so when connecting a gem5 CPU to an SST cache, an ExternalSlave
must be used, and similarly when connecting the memory side of SST cache
to a gem5 port (for memory <-> I/O), an ExternalMaster must be used.

These connectors handle the administrative aspects of gem5
(initialization, simulation, shutdown) as well as translating SST's
MemEvents into gem5 Packets and vice-versa.
/gem5/src/arch/x86/isa/insts/simd128/floating_point/arithmetic/
H A Dreciprocal_estimation.py11160:10f28b61fcb1 Tue Oct 06 20:26:00 EDT 2015 Steve Reinhardt <steve.reinhardt@amd.com> x86: implement rcpps and rcpss SSE insts

These are packed single-precision approximate reciprocal operations,
vector and scalar versions, respectively.

This code was basically developed by copying the code for
sqrtps and sqrtss. The mrcp micro-op was simplified relative to
msqrt since there are no double-precision versions of this operation.
/gem5/src/arch/x86/isa/insts/x87/compare_and_test/
H A Dfloating_point_unordered_compare.py11159:9459593cb649 Tue Oct 06 20:26:00 EDT 2015 Steve Reinhardt <steve.reinhardt@amd.com> x86: implement fild, fucomi, and fucomip x87 insts

fild loads an integer value into the x87 top of stack register.
fucomi/fucomip compare two x87 register values (the latter
also doing a stack pop).
These instructions are used by some versions of GNU libstdc++.
/gem5/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/
H A Dconvert_and_load_or_store_integer.py11159:9459593cb649 Tue Oct 06 20:26:00 EDT 2015 Steve Reinhardt <steve.reinhardt@amd.com> x86: implement fild, fucomi, and fucomip x87 insts

fild loads an integer value into the x87 top of stack register.
fucomi/fucomip compare two x87 register values (the latter
also doing a stack pop).
These instructions are used by some versions of GNU libstdc++.
/gem5/src/mem/ruby/profiler/
H A DStoreTrace.hh11061:25b53a7195f7 Sat Aug 29 11:19:00 EDT 2015 Nilay Vaish <nilay@cs.wisc.edu> ruby: eliminate type uint64 and int64
These types are being replaced with uint64_t and int64_t.
11049:dfb0aa3f0649 Wed Aug 19 11:02:00 EDT 2015 Nilay Vaish <nilay@cs.wisc.edu> ruby: reverts to changeset: bf82f1f7b040
11031:3815437cb231 Fri Aug 14 20:28:00 EDT 2015 Nilay Vaish <nilay@cs.wisc.edu> ruby: eliminate type uint64 and int64

These types are being replaced with uint64_t and int64_t.
11025:4872dbdea907 Fri Aug 14 01:04:00 EDT 2015 Nilay Vaish <nilay@cs.wisc.edu> ruby: replace Address by Addr
This patch eliminates the type Address defined by the ruby memory system.
This memory system would now use the type Addr that is in use by the
rest of the system.
H A DStoreTrace.cc11061:25b53a7195f7 Sat Aug 29 11:19:00 EDT 2015 Nilay Vaish <nilay@cs.wisc.edu> ruby: eliminate type uint64 and int64
These types are being replaced with uint64_t and int64_t.
11049:dfb0aa3f0649 Wed Aug 19 11:02:00 EDT 2015 Nilay Vaish <nilay@cs.wisc.edu> ruby: reverts to changeset: bf82f1f7b040
11031:3815437cb231 Fri Aug 14 20:28:00 EDT 2015 Nilay Vaish <nilay@cs.wisc.edu> ruby: eliminate type uint64 and int64

These types are being replaced with uint64_t and int64_t.
11025:4872dbdea907 Fri Aug 14 01:04:00 EDT 2015 Nilay Vaish <nilay@cs.wisc.edu> ruby: replace Address by Addr
This patch eliminates the type Address defined by the ruby memory system.
This memory system would now use the type Addr that is in use by the
rest of the system.
/gem5/src/mem/slicc/ast/
H A DVarExprAST.py10972:53d63eeee46f Mon Jul 20 10:15:00 EDT 2015 David Hashe <david.hashe@amd.com> slicc: support for arbitrary DPRINTF flags (not just RubySlicc)

This patch allows DPRINTFs to be used in SLICC state machines similar to how
they are used by the rest of gem5. Previously all DPRINTFs in the .sm files
had to use the RubySlicc flag.
/gem5/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/
H A Dtestsys.terminal11219:b65d4e878ed2 Mon Nov 16 06:08:00 EST 2015 Nilay Vaish <nilay@cs.wisc.edu> stats: updates due to recent chagnesets
H A Ddrivesys.terminal11219:b65d4e878ed2 Mon Nov 16 06:08:00 EST 2015 Nilay Vaish <nilay@cs.wisc.edu> stats: updates due to recent chagnesets
/gem5/util/cpt_upgraders/
H A Darm-hdlcd-upgrade.py11090:f37a6b82f98f Fri Sep 11 10:55:00 EDT 2015 Andreas Sandberg <andreas.sandberg@arm.com> dev, arm: Rewrite the HDLCD controller

Rewrite the HDLCD controller to use the new DMA engine and pixel
pump. This fixes several bugs in the current implementation:

* Broken/missing interrupt support (VSync, underrun, DMA end)
* Fragile resolution changes (changing resolutions used
to cause assertion errors).
* Support for resolutions with a width that isn't divisible by 32.
* The pixel clock can now be set dynamically.

This breaks checkpoint compatibility. Checkpoints can be upgraded with
the checkpoint conversion script. However, upgraded checkpoints won't
contain the state of the current frame. That means that HDLCD
controllers restoring from a converted checkpoint immediately start
drawing a new frame (i.e, expect timing differences).
/gem5/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/
H A Dconfig.ini11268:8b4b55d79ddd Sat Dec 12 17:27:00 EST 2015 Anthony Gutierrez <atgutier@umich.edu> stats: bump stats to reflect ruby tester changes
11245:1c5102c0a7a9 Fri Dec 04 19:11:00 EST 2015 Andreas Sandberg <andreas.sandberg@arm.com> stats: Update to reflect changes to PCI handling
11219:b65d4e878ed2 Mon Nov 16 06:08:00 EST 2015 Nilay Vaish <nilay@cs.wisc.edu> stats: updates due to recent chagnesets
11167:207d6f2f1d53 Sat Oct 10 17:45:00 EDT 2015 Joel Hestness <jthestness@gmail.com> stats: Update for UDelayEvent quiesce change
11103:38f6188421e0 Tue Sep 15 09:14:00 EDT 2015 Nilay Vaish <nilay@cs.wisc.edu> stats: updates due to recent changesets including d0934b57735a
10901:8cfa8dac39fe Sun Jul 05 21:26:00 EDT 2015 Nilay Vaish <nilay@cs.wisc.edu> stats: x86: update stats missed out on in preivous changeset
10736:4433fb00fa7d Mon Mar 09 10:39:00 EDT 2015 Nilay Vaish <nilay@cs.wisc.edu> stats: changes to due to recent set of patches
10639:469cf1ea40f5 Wed Jan 07 03:31:00 EST 2015 Gabe Black <gabeblack@google.com> stats: x86: Update stats for the CPUID change.
10636:9ac724889705 Sun Jan 04 14:02:00 EST 2015 Nilay Vaish <nilay@cs.wisc.edu> stats: changes due to recent changesets.
/gem5/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/
H A Dstats.txt11281:953f7d1cc9e3 Wed Dec 30 11:18:00 EST 2015 Steve Reinhardt <stever@gmail.com> stats: more updates due to PCI changes

A couple of the long regressions have been showing as CHANGED
since 11244:a2af58a06c4e despite the updates in 11245:1c5102c0a7a9.
The x86 regression looks like it was just missed, but it's not clear
why the ARM one is giving different results (perhaps a non-determinism
between zizzer and wherever the updated results were run?).
11201:b1bd4afb6b16 Fri Nov 06 03:26:00 EST 2015 Andreas Hansson <andreas.hansson@arm.com> stats: Update stats to match cache changes
11066:969113566d50 Sun Aug 30 01:24:00 EDT 2015 Nilay Vaish <nilay@cs.wisc.edu> stats: updates due to recent changes.
11026:bf2fc8f7e432 Fri Aug 14 20:26:00 EDT 2015 Nilay Vaish <nilay@cs.wisc.edu> stats: updates to ruby fs regression test

Changes due to recent patches: fc1e41e88fd3, 882ce080c9f7, e8a6637afa4c, and
e6e3b7097810 by Joel Hestness.
10999:e5744056cf76 Wed Aug 05 04:36:00 EDT 2015 Andreas Hansson <andreas.hansson@arm.com> stats: Reflect current behaviour

Not sure what went wrong in the pushing of the Ruby patches, but
somehow these regressions are not updated.
10900:ac6617bf9967 Sat Jul 04 11:43:00 EDT 2015 Nilay Vaish <nilay@cs.wisc.edu> stats: update stale config.ini files, eio and few other stats.
10892:bd37e25fb3b7 Fri Jul 03 10:15:00 EDT 2015 Andreas Hansson <andreas.hansson@arm.com> stats: Update stats for cache, crossbar and DRAM changes

This update includes the changes to whole-line writes, the refinement
of Read to ReadClean and ReadShared, the introduction of CleanEvict
for snoop-filter tracking, and updates to the DRAM command scheduler
for bank-group-aware scheduling.

Needless to say, almost every regression is affected.
10813:c6189a9b8cd7 Tue May 05 03:22:00 EDT 2015 Andreas Hansson <andreas.hansson@arm.com> stats: Bring regression stats in line with actual behaviour
10645:cd95d4d51659 Sat Jan 10 19:06:00 EST 2015 Nilay Vaish <nilay@cs.wisc.edu> stats: changes due to recent changesets.
/gem5/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-minor/
H A Dsimerr11245:1c5102c0a7a9 Fri Dec 04 19:11:00 EST 2015 Andreas Sandberg <andreas.sandberg@arm.com> stats: Update to reflect changes to PCI handling
H A Dstats.txt11245:1c5102c0a7a9 Fri Dec 04 19:11:00 EST 2015 Andreas Sandberg <andreas.sandberg@arm.com> stats: Update to reflect changes to PCI handling
11201:b1bd4afb6b16 Fri Nov 06 03:26:00 EST 2015 Andreas Hansson <andreas.hansson@arm.com> stats: Update stats to match cache changes
11138:a611a23c8cc2 Fri Sep 25 07:27:00 EDT 2015 Andreas Hansson <andreas.hansson@arm.com> stats: Update stats to reflect snoop-filter changes
11103:38f6188421e0 Tue Sep 15 09:14:00 EDT 2015 Nilay Vaish <nilay@cs.wisc.edu> stats: updates due to recent changesets including d0934b57735a
10892:bd37e25fb3b7 Fri Jul 03 10:15:00 EDT 2015 Andreas Hansson <andreas.hansson@arm.com> stats: Update stats for cache, crossbar and DRAM changes

This update includes the changes to whole-line writes, the refinement
of Read to ReadClean and ReadShared, the introduction of CleanEvict
for snoop-filter tracking, and updates to the DRAM command scheduler
for bank-group-aware scheduling.

Needless to say, almost every regression is affected.
10852:5b58b4cccfd7 Tue May 26 03:21:00 EDT 2015 Andreas Hansson <andreas.hansson@arm.com> stats: Update MinorCPU regressions after accounting fix
10827:7f5467f2f8b8 Tue May 05 03:22:00 EDT 2015 Andreas Hansson <andreas.hansson@arm.com> stats: Update stats to reflect cache changes
10726:8a20e2a1562d Mon Mar 02 05:04:00 EST 2015 Andreas Hansson <andreas.hansson@arm.com> stats: Update stats to reflect cache and interconnect changes

This is a bulk update of stats to match the changes to cache timing,
interconnect timing, and a few minor changes to the o3 CPU.
10636:9ac724889705 Sun Jan 04 14:02:00 EST 2015 Nilay Vaish <nilay@cs.wisc.edu> stats: changes due to recent changesets.
/gem5/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/
H A Dsimerr10798:74e3c7359393 Wed Apr 22 23:22:00 EDT 2015 Steve Reinhardt <steve.reinhardt@amd.com> stats: update for previous changeset

Very small differences in IQ-specific O3 stats.
/gem5/tests/quick/se/03.learning-gem5/ref/mips/linux/learning-gem5-p1-two-level/
H A Dsimerr11106:878dd30741c4 Wed Sep 16 10:35:00 EDT 2015 Jason Lowe-Power <power.jg@gmail.com> stats: files for regression tests for Learning gem5 scripts

Committed by: Nilay Vaish <nilay@cs.wisc.edu>
/gem5/tests/quick/se/03.learning-gem5/ref/mips/linux/learning-gem5-p1-simple/
H A Dsimerr11106:878dd30741c4 Wed Sep 16 10:35:00 EDT 2015 Jason Lowe-Power <power.jg@gmail.com> stats: files for regression tests for Learning gem5 scripts

Committed by: Nilay Vaish <nilay@cs.wisc.edu>
/gem5/src/mem/probes/
H A Dbase.cc10994:51ff41f6a4a5 Tue Aug 04 05:29:00 EDT 2015 Andreas Sandberg <andreas.sandberg@arm.com> mem: Add probe support to the CommMonitor

This changeset adds a standardized probe point type to monitor packets
in the memory system and adds two probe points to the CommMonitor
class. These probe points enable monitoring of successfully delivered
requests and successfully delivered responses.

Memory system probe listeners should use the BaseMemProbe base class
to provide a unified configuration interface and reuse listener
registration code. Unlike the ProbeListenerObject class, the
BaseMemProbe allows objects to be wired to multiple ProbeManager
instances as long as they use the same probe point name.
/gem5/src/mem/ruby/structures/
H A DWireBuffer.cc11116:d6fb95dbf3e2 Thu Sep 17 14:00:00 EDT 2015 Tony Gutierrez <anthony.gutierrez@amd.com> ruby: update WireBuffer API to match that of MessageBuffer

this patch updates the WireBuffer API to mirror the changes in revision 11111
11108:6342ddf6d733 Wed Sep 16 00:03:00 EDT 2015 David Hashe <david.hashe@amd.com> ruby: rename System.{hh,cc} to RubySystem.{hh,cc}

The eventual aim of this change is to pass RubySystem pointers through to
objects generated from the SLICC protocol code.

Because some of these objects need to dereference their RubySystem pointers,
they need access to the System.hh header file.

In src/mem/ruby/SConscript, the MakeInclude function creates single-line header
files in the build directory that do nothing except include the corresponding
header file from the source tree.

However, SLICC also generates a list of header files from its symbol table, and
writes it to mem/protocol/Types.hh in the build directory. This code assumes
that the header file name is the same as the class name.

The end result of this is the many of the generated slicc files try to include
RubySystem.hh, when the file they really need is System.hh. The path of least
resistence is just to rename System.hh to RubySystem.hh.
10919:80069a602c83 Fri Jul 10 17:05:00 EDT 2015 Brandon Potter <brandon.potter@amd.com> ruby: replace global g_system_ptr with per-object pointers

This is another step in the process of removing global variables
from Ruby to enable multiple RubySystem instances in a single simulation.

With possibly multiple RubySystem objects, we can no longer use a global
variable to find "the" RubySystem object. Instead, each Ruby component
has to carry a pointer to the RubySystem object to which it belongs.
10893:f567e80c0714 Sat Jul 04 11:43:00 EDT 2015 Nilay Vaish <nilay@cs.wisc.edu> ruby: remove message buffer node

This structure's only purpose was to provide a comparison function for
ordering messages in the MessageBuffer. The comparison function is now
being moved to the Message class itself. So we no longer require this
structure.
/gem5/src/sim/
H A Dbacktrace_glibc.cc11235:4162427127e9 Thu Dec 03 19:12:00 EST 2015 Andreas Sandberg <andreas.sandberg@arm.com> sim: Add support for generating back traces on errors

Add functionality to generate a back trace if gem5 crashes (SIGABRT or
SIGSEGV). The current implementation uses glibc's stack traversal
support if available and stubs out the call to print_backtrace()
otherwise.
/gem5/src/arch/arm/freebsd/
H A Dprocess.hh10810:683ab55819fd Wed Apr 29 23:35:00 EDT 2015 Ruslan Bukin <br@bsdpad.com> arch, base, dev, kern, sym: FreeBSD support

This adds support for FreeBSD/aarch64 FS and SE mode (basic set of syscalls only)

Committed by: Nilay Vaish <nilay@cs.wisc.edu>
/gem5/src/kern/freebsd/
H A Dfreebsd.hh10810:683ab55819fd Wed Apr 29 23:35:00 EDT 2015 Ruslan Bukin <br@bsdpad.com> arch, base, dev, kern, sym: FreeBSD support

This adds support for FreeBSD/aarch64 FS and SE mode (basic set of syscalls only)

Committed by: Nilay Vaish <nilay@cs.wisc.edu>
/gem5/tests/quick/se/10.mcf/
H A Dtest.py10754:02621b4f013b Mon Mar 23 06:57:00 EDT 2015 Andreas Hansson <andreas.hansson@arm.com> tests: Final reclassification of quick regressions

A few regressions were still considered long, but finished well within
the 180 seconds. They are only a handful (mostly mcf in atomic).
/gem5/tests/quick/se/30.eon/
H A Dtest.py10754:02621b4f013b Mon Mar 23 06:57:00 EDT 2015 Andreas Hansson <andreas.hansson@arm.com> tests: Final reclassification of quick regressions

A few regressions were still considered long, but finished well within
the 180 seconds. They are only a handful (mostly mcf in atomic).
/gem5/tests/quick/se/50.vortex/ref/arm/linux/simple-atomic/
H A Dconfig.ini11268:8b4b55d79ddd Sat Dec 12 17:27:00 EST 2015 Anthony Gutierrez <atgutier@umich.edu> stats: bump stats to reflect ruby tester changes
11219:b65d4e878ed2 Mon Nov 16 06:08:00 EST 2015 Nilay Vaish <nilay@cs.wisc.edu> stats: updates due to recent chagnesets
11066:969113566d50 Sun Aug 30 01:24:00 EDT 2015 Nilay Vaish <nilay@cs.wisc.edu> stats: updates due to recent changes.
10752:62b24818c8c6 Thu Mar 19 04:06:00 EDT 2015 Andreas Hansson <andreas.hansson@arm.com> tests: Recategorise regressions based on run time

This patch takes a first stab at recategorising the regression tests
based on actual run times. The simple-atomic and simple-timing runs of
vortex and twolf all finish in less than 180 s, and they are
consequently moved from long to quick. All realview64 linux-boot
regressions take more than 700 s, and they are therefore moved to
long.

Later patches will rename quick to short, and further divide the
regressions into short, medium and long.

Completed in 66 milliseconds

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