Searched hist:2007 (Results 76 - 100 of 895) sorted by relevance

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/gem5/ext/libelf/
H A Delf_update.c4494:b7c909b5a5e9 Wed May 30 17:08:00 EDT 2007 Ali Saidi <saidi@eecs.umich.edu> Fix compiling on Solaris since Nate's libelf change

SConstruct:
export env after we've set CC/CXX
ext/libelf/SConscript:
pull in the CC/CXX variables from env. Use gm4 if it exists
ext/libelf/elf_begin.c:
ext/libelf/libelf_allocate.c:
include errno.h instead of sys/errno.h
ext/libelf/elf_common.h:
use the more standard uintX_t
ext/libelf/elf_strptr.c:
ext/libelf/elf_update.c:
include sysmacros.h on Solaris for roundup()
4484:7c56a6c9c265 Sat May 26 21:15:00 EDT 2007 Nathan Binkert <binkertn@umich.edu> Get rid of GNU libelf and its autoconf nastiness and replace
it with FreeBSD's implementation
H A Dlibelf_allocate.c4494:b7c909b5a5e9 Wed May 30 17:08:00 EDT 2007 Ali Saidi <saidi@eecs.umich.edu> Fix compiling on Solaris since Nate's libelf change

SConstruct:
export env after we've set CC/CXX
ext/libelf/SConscript:
pull in the CC/CXX variables from env. Use gm4 if it exists
ext/libelf/elf_begin.c:
ext/libelf/libelf_allocate.c:
include errno.h instead of sys/errno.h
ext/libelf/elf_common.h:
use the more standard uintX_t
ext/libelf/elf_strptr.c:
ext/libelf/elf_update.c:
include sysmacros.h on Solaris for roundup()
4484:7c56a6c9c265 Sat May 26 21:15:00 EDT 2007 Nathan Binkert <binkertn@umich.edu> Get rid of GNU libelf and its autoconf nastiness and replace
it with FreeBSD's implementation
/gem5/src/arch/mips/bare_iron/
H A Dsystem.hh5268:5bfc53fe60e7 Fri Nov 16 21:32:00 EST 2007 Korey Sewell <ksewell@umich.edu> go back and fix up MIPS copyright headers
5222:bb733a878f85 Tue Nov 13 16:58:00 EST 2007 Korey Sewell <ksewell@umich.edu> Add in files from merge-bare-iron, get them compiling in FS and SE mode
H A Dsystem.cc5268:5bfc53fe60e7 Fri Nov 16 21:32:00 EST 2007 Korey Sewell <ksewell@umich.edu> go back and fix up MIPS copyright headers
5222:bb733a878f85 Tue Nov 13 16:58:00 EST 2007 Korey Sewell <ksewell@umich.edu> Add in files from merge-bare-iron, get them compiling in FS and SE mode
/gem5/src/arch/x86/isa/insts/general_purpose/compare_and_test/
H A Dset_byte_on_condition.py5166:d749d156ce52 Fri Oct 19 01:42:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Implement the undocumented SALC instruction which sets AL to 0xFF if CF=1 and 0x00 otherwise.
5081:2ccce8600a9d Wed Sep 19 21:25:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode.
H A D__init__.py5081:2ccce8600a9d Wed Sep 19 21:25:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode.
H A Dcompare.py5081:2ccce8600a9d Wed Sep 19 21:25:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode.
/gem5/src/arch/x86/isa/insts/general_purpose/flags/
H A Dload_and_store.py5174:73a760aa0129 Fri Oct 19 18:21:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Implement the PUSHF, POPF, SAHF, and LAHF instructions.
5081:2ccce8600a9d Wed Sep 19 21:25:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode.
H A D__init__.py5081:2ccce8600a9d Wed Sep 19 21:25:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode.
/gem5/src/arch/x86/isa/decoder/
H A Done_byte_opcodes.isa5295:5268691561b4 Sun Dec 02 02:05:00 EST 2007 Gabe Black <gblack@eecs.umich.edu> X86: First crack at far returns. This is grossly approximate.
5294:7222bdaed33b Sun Dec 02 02:03:00 EST 2007 Gabe Black <gblack@eecs.umich.edu> X86: Reorganize segmentation and implement segment selector movs.
5174:73a760aa0129 Fri Oct 19 18:21:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Implement the PUSHF, POPF, SAHF, and LAHF instructions.
5173:07204d59a328 Fri Oct 19 18:11:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Impelement the HLT instruction and fix the "halt" microop.
5171:eab735dc951d Fri Oct 19 18:09:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Implement the ENTER instruction. This could probably be optimized by cleaning up the indexing in the main loop.
5168:0fee957f6842 Fri Oct 19 01:43:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Replace "group10" placeholder with the corresponding instructions in the decoder.
5167:3668fc87f144 Fri Oct 19 01:42:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Implement the string IO instructions, ins and outs.
5166:d749d156ce52 Fri Oct 19 01:42:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Implement the undocumented SALC instruction which sets AL to 0xFF if CF=1 and 0x00 otherwise.
5165:ce7b4b8a24c5 Fri Oct 19 01:41:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Implement the XLAT instruction.
5164:c2124685af1d Fri Oct 19 01:40:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Implement the BOUND instruction.
/gem5/src/dev/mips/
H A Daccess.h5222:bb733a878f85 Tue Nov 13 16:58:00 EST 2007 Korey Sewell <ksewell@umich.edu> Add in files from merge-bare-iron, get them compiling in FS and SE mode
/gem5/src/unittest/
H A Dcprintftime.cc4038:c6ff99162387 Thu Feb 08 01:02:00 EST 2007 Nathan Binkert <binkertn@umich.edu> Quick program to time how long ccprintf takes to write
to a stream compared to sprintf to a buffer.
/gem5/configs/boot/
H A Dmutex-test.rcS4407:e11a784de928 Thu Apr 26 00:10:00 EDT 2007 Kevin Lim <ktlim@umich.edu> Fix mutex test script for latest disk image.
/gem5/src/arch/mips/
H A Dmt_constants.hh5268:5bfc53fe60e7 Fri Nov 16 21:32:00 EST 2007 Korey Sewell <ksewell@umich.edu> go back and fix up MIPS copyright headers
5222:bb733a878f85 Tue Nov 13 16:58:00 EST 2007 Korey Sewell <ksewell@umich.edu> Add in files from merge-bare-iron, get them compiling in FS and SE mode
4835:224d8f96e155 Wed Aug 01 16:55:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> MIPS: Cleaned up includes to break loops, and got rid of isa_traits.cc
Loops of header files including each other was causing compilation to fail. To fix it, a bunch of unnecessary includes were removed, and the code in isa_traits.cc which brought a bunch of include chains together was broken up and put in proximity to the header files that delcared it.
4661:44458219add1 Fri Jun 22 19:03:00 EDT 2007 Korey Sewell <ksewell@umich.edu> mips import pt. 1

src/arch/mips/SConscript:
"mips import pt.1".
/gem5/src/arch/x86/isa/insts/
H A D__init__.py5081:2ccce8600a9d Wed Sep 19 21:25:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode.
5029:68c3f3be8c8a Wed Aug 29 23:37:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Implement the movlpd instruction.
4730:77e3e9b15e7e Fri Jul 20 21:27:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> Implement UD2 and replace the place holder in the decoder.
4529:5f32651bc10e Fri Jun 08 12:13:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> Move the microcode assembly to a python package instead of isa_parser files. Also, the code is now a single string which runs through the microcode assembler rather than docstrings associated with classes named after each architectural level instruction.
/gem5/src/arch/x86/isa/insts/general_purpose/arithmetic/
H A D__init__.py5081:2ccce8600a9d Wed Sep 19 21:25:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode.
/gem5/src/arch/x86/isa/insts/general_purpose/control_transfer/
H A D__init__.py5081:2ccce8600a9d Wed Sep 19 21:25:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode.
/gem5/src/arch/x86/isa/insts/general_purpose/data_conversion/
H A D__init__.py5081:2ccce8600a9d Wed Sep 19 21:25:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode.
/gem5/src/arch/x86/isa/insts/general_purpose/data_transfer/
H A D__init__.py5081:2ccce8600a9d Wed Sep 19 21:25:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode.
/gem5/src/arch/x86/isa/insts/general_purpose/input_output/
H A D__init__.py5081:2ccce8600a9d Wed Sep 19 21:25:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode.
/gem5/src/arch/x86/isa/insts/general_purpose/
H A Dload_effective_address.py5081:2ccce8600a9d Wed Sep 19 21:25:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode.
/gem5/src/arch/x86/isa/insts/general_purpose/rotate_and_shift/
H A D__init__.py5081:2ccce8600a9d Wed Sep 19 21:25:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode.
/gem5/src/arch/x86/isa/insts/general_purpose/string/
H A D__init__.py5081:2ccce8600a9d Wed Sep 19 21:25:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode.
/gem5/src/arch/x86/isa/insts/simd128/
H A D__init__.py5081:2ccce8600a9d Wed Sep 19 21:25:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode.
/gem5/src/arch/x86/isa/insts/simd128/floating_point/
H A D__init__.py5081:2ccce8600a9d Wed Sep 19 21:25:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode.

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