Searched hist:160 (Results 1 - 2 of 2) sorted by relevance
| /gem5/src/arch/riscv/ | ||
| H A D | process.hh | 12030:160fc15c495f Mon May 15 15:03:00 EDT 2017 Brandon Potter <brandon.potter@amd.com> syscall_emul, riscv: add override keyword to RISCV Process class Change-Id: I2a146ae57aac3787389997961208474a97e7c155 Reviewed-on: https://gem5-review.googlesource.com/3360 Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Alec Roelke <ar4jc@virginia.edu> |
| /gem5/src/systemc/core/ | ||
| H A D | process.cc | 13310:160fb526ab4d Sat Oct 06 07:31:00 EDT 2018 Gabe Black <gabeblack@google.com> systemc: When resetting a process, clear suspended ready. When resetting a process which is ready pending coming out of suspend, clear that state since the process is about to run in service of the reset. Change-Id: Iade3ec4b2f3eadd372cce456dca66850d37ed5fd Reviewed-on: https://gem5-review.googlesource.com/c/13316 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com> |
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