Searched hist:13469 (Results 1 - 3 of 3) sorted by relevance

/gem5/src/dev/net/
H A DSConscript13340:2c95525a40f9 Thu Oct 11 21:00:00 EDT 2018 Gabe Black <gabeblack@google.com> dev: Build most of the networking devices in the NULL_ISA build.

The only part of these devices which are incompatible with other ISAs,
with the possible exception of endianness transformation, is that
the dist_iface implementation refers to ThreadContext methods and
that class is heavily tied to the guest ISA. Only those few lines are
excluded in a NULL_ISA build.

Change-Id: Ic6d643fdbb792d0a996a37d75e027c5ce0ecd460
Reviewed-on: https://gem5-review.googlesource.com/c/13469
Reviewed-by: Gabor Dozsa <gabor.dozsa@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
H A Ddist_iface.cc13340:2c95525a40f9 Thu Oct 11 21:00:00 EDT 2018 Gabe Black <gabeblack@google.com> dev: Build most of the networking devices in the NULL_ISA build.

The only part of these devices which are incompatible with other ISAs,
with the possible exception of endianness transformation, is that
the dist_iface implementation refers to ThreadContext methods and
that class is heavily tied to the guest ISA. Only those few lines are
excluded in a NULL_ISA build.

Change-Id: Ic6d643fdbb792d0a996a37d75e027c5ce0ecd460
Reviewed-on: https://gem5-review.googlesource.com/c/13469
Reviewed-by: Gabor Dozsa <gabor.dozsa@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
/gem5/src/arch/arm/
H A Dremote_gdb.cc13469:3090dae4115b Tue Nov 13 19:00:00 EST 2018 Ciro Santilli <ciro.santilli@arm.com> arch-arm: only change the pc address when GDB registers are set

The entire pcState was being reset, which made the simulation incorrectly
switch to aarch32 from aarch64.

Change-Id: I9ba7dd0ed95bc6120d94393bba272e0cb8c081c5
Reviewed-on: https://gem5-review.googlesource.com/c/14496
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>

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