Searched hist:12498 (Results 1 - 3 of 3) sorted by relevance

/gem5/src/arch/arm/insts/
H A Dstatic_inst.hh12498:309fbaf29a40 Thu Dec 14 12:38:00 EST 2017 Giacomo Travaglini <giacomo.travaglini@arm.com> arch-arm: Fix AArch32 SETEND Instruction

This patch fixes AArch32 SETEND instruction, which was previously
executed unconditionally without checking (H)SCTLR.SED field. This bit
enables/disables the trapping of the instruction.

Change-Id: Ib3d2194c8d16c34ec2a9ab3e8090081900c1e42e
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/7981
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
H A Dstatic_inst.cc12498:309fbaf29a40 Thu Dec 14 12:38:00 EST 2017 Giacomo Travaglini <giacomo.travaglini@arm.com> arch-arm: Fix AArch32 SETEND Instruction

This patch fixes AArch32 SETEND instruction, which was previously
executed unconditionally without checking (H)SCTLR.SED field. This bit
enables/disables the trapping of the instruction.

Change-Id: Ib3d2194c8d16c34ec2a9ab3e8090081900c1e42e
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/7981
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
/gem5/src/arch/arm/isa/insts/
H A Dmisc.isa12498:309fbaf29a40 Thu Dec 14 12:38:00 EST 2017 Giacomo Travaglini <giacomo.travaglini@arm.com> arch-arm: Fix AArch32 SETEND Instruction

This patch fixes AArch32 SETEND instruction, which was previously
executed unconditionally without checking (H)SCTLR.SED field. This bit
enables/disables the trapping of the instruction.

Change-Id: Ib3d2194c8d16c34ec2a9ab3e8090081900c1e42e
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/7981
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

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