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/gem5/src/arch/generic/
H A Dvec_reg.hh12108:885cbffd3ab0 Wed Apr 05 14:20:00 EDT 2017 Rekai Gonzalez-Alberquilla <Rekai.GonzalezAlberquilla@arm.com> arch: added generic vector register

This commit adds a new generic vector register to have a cleaner
implementation of SIMD ISAs.

Nathanael's idea, Rekai's implementation.

Change-Id: I60b250bba6423153b7e04d2e6988d517a70a3e6b
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2704
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
/gem5/src/gpu-compute/
H A Dgpu_dyn_inst.hh12889:6d4515549710 Thu Aug 16 20:58:00 EDT 2018 Brandon Potter <brandon.potter@amd.com> hsail-x86: fix gpu dynamic instruction error

The gpu_dyn_inst.hh file was missing a clone method from
inherited classes. (The clone method is the way to implement
the prototype design pattern.) Because the inherited clone
method was declare as pure virtual, the method needed to
be implemented. Otherwise, the compiler complains that the
class is abstract.

Change-Id: I38782d5f7379f32be886401f7c127fe60d2f8811
Reviewed-on: https://gem5-review.googlesource.com/12108
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>

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